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| author | Angel Pons <th3fanbus@gmail.com> | 2021-10-17 12:59:43 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-10-19 14:57:39 +0000 |
| commit | d2794cea1291f7f6e35b426b8b66cbb08da6d532 (patch) | |
| tree | 3a020a2e5e864ee5ee4906215e220c8e10969924 /src/soc/amd/cezanne | |
| parent | 14643b33b0f7ea9cde6ce8230793562d4a1b475c (diff) | |
| download | coreboot-d2794cea1291f7f6e35b426b8b66cbb08da6d532.tar.gz coreboot-d2794cea1291f7f6e35b426b8b66cbb08da6d532.tar.bz2 coreboot-d2794cea1291f7f6e35b426b8b66cbb08da6d532.zip | |
acpi/acpigen: Constify CST functions' pointers
The `acpigen_write_CST_package` and `acpigen_write_CST_package_entry`
functions don't modify the provided C-state information. So, make the
pointer parameters read-only to enforce this. Also constify arguments
where possible.
Change-Id: I9e18d82ee6c16e4435b8fad6d467e58c33194cf4
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58391
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/soc/amd/cezanne')
| -rw-r--r-- | src/soc/amd/cezanne/acpi.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/amd/cezanne/acpi.c b/src/soc/amd/cezanne/acpi.c index 3b3a88befe86..d390ca4f220e 100644 --- a/src/soc/amd/cezanne/acpi.c +++ b/src/soc/amd/cezanne/acpi.c @@ -279,7 +279,7 @@ void generate_cpu_entries(const struct device *device) .addrl = PS_STS_REG, }; - acpi_cstate_t cstate_info[] = { + const acpi_cstate_t cstate_info[] = { [0] = { .ctype = 1, .latency = 1, |