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| author | Raul E Rangel <rrangel@chromium.org> | 2021-07-12 09:50:49 -0600 |
|---|---|---|
| committer | Raul Rangel <rrangel@chromium.org> | 2021-07-14 17:53:42 +0000 |
| commit | 72240430cf26fd269e89a730f70eab582153d445 (patch) | |
| tree | e390869ac02c7e153c7dfdf6f255016a3ba8bd20 /src/soc/amd/common/block/apob | |
| parent | a24472a7f88ecfea999e4962931e14f2b319b47a (diff) | |
| download | coreboot-72240430cf26fd269e89a730f70eab582153d445.tar.gz coreboot-72240430cf26fd269e89a730f70eab582153d445.tar.bz2 coreboot-72240430cf26fd269e89a730f70eab582153d445.zip | |
soc/amd/common/block/apob: Fix incorrect printf format
The %p format specifier already prints out 0x, so remove the 0x from the
string. I also updated the other format specifiers to use the %# syntax
to print out the 0x.
BUG=b:179699789
TEST=see correct format.
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: I5b00d2c06687e549f69486eb5e18f7bed560b2ec
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56225
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/common/block/apob')
| -rw-r--r-- | src/soc/amd/common/block/apob/apob_cache.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/amd/common/block/apob/apob_cache.c b/src/soc/amd/common/block/apob/apob_cache.c index 238ae7af2a0a..34d54727fceb 100644 --- a/src/soc/amd/common/block/apob/apob_cache.c +++ b/src/soc/amd/common/block/apob/apob_cache.c @@ -131,7 +131,7 @@ void soc_update_apob_cache(void) return; } - printk(BIOS_SPEW, "Copy APOB from RAM 0x%p/0x%x to flash 0x%zx/0x%zx\n", + printk(BIOS_SPEW, "Copy APOB from RAM %p/%#x to flash %#zx/%#zx\n", apob_src_ram, apob_src_ram->size, region_offset(®ion), region_sz(®ion)); |