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author | Raul E Rangel <rrangel@chromium.org> | 2022-04-25 13:32:35 -0600 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2022-04-27 11:33:00 +0000 |
commit | dbeae6ab008cc0062bdc17bde1aa5dd1b1fd14a5 (patch) | |
tree | b1c393b7a516ccc2e6640667cc640458d126fc90 /src/soc/amd/common/block/lpc/Kconfig | |
parent | d0dc50cf6b514c3260cb423088eb56172da1c992 (diff) | |
download | coreboot-dbeae6ab008cc0062bdc17bde1aa5dd1b1fd14a5.tar.gz coreboot-dbeae6ab008cc0062bdc17bde1aa5dd1b1fd14a5.tar.bz2 coreboot-dbeae6ab008cc0062bdc17bde1aa5dd1b1fd14a5.zip |
soc/amd/common/block/lpc/espi: Add support for ALERT_ENABLE bit
This bit is new on sabrina. We need to enable it after initialization
has completed.
BUG=b:227282870
TEST=Boot skyrim to OS and verify keyboard works
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: I795275993589e20c1d09674232ecff782c491335
Reviewed-on: https://review.coreboot.org/c/coreboot/+/63842
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jon Murphy <jpmurphy@google.com>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Diffstat (limited to 'src/soc/amd/common/block/lpc/Kconfig')
-rw-r--r-- | src/soc/amd/common/block/lpc/Kconfig | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/soc/amd/common/block/lpc/Kconfig b/src/soc/amd/common/block/lpc/Kconfig index 125f8b326a6e..b1db1bd25438 100644 --- a/src/soc/amd/common/block/lpc/Kconfig +++ b/src/soc/amd/common/block/lpc/Kconfig @@ -36,6 +36,12 @@ config SOC_AMD_COMMON_BLOCK_HAS_ESPI Select this option if platform supports eSPI using D14F3 configuration registers. +config SOC_AMD_COMMON_BLOCK_HAS_ESPI_ALERT_ENABLE + bool + depends on SOC_AMD_COMMON_BLOCK_HAS_ESPI + help + Selected by the SoC if it supports the ALERT_ENABLE bit. + config SOC_AMD_COMMON_BLOCK_USE_ESPI bool depends on SOC_AMD_COMMON_BLOCK_HAS_ESPI |