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authorRob Barnes <robbarnes@google.com>2021-12-10 14:28:21 -0700
committerFelix Held <felix-coreboot@felixheld.de>2021-12-14 16:03:40 +0000
commit3437a6fbb0f6d61a692a0c0b82c45b77e27ead8e (patch)
treeceea4704857ba8f0082a8a1ee788b3577a3892af /src/soc/amd/common/psp_verstage/Kconfig
parent941239d54d972f23c42dc47d19801e2dc4957063 (diff)
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soc/amd/{cezanne,common}: Add PSP_S0I3_RESUME_VERSTAGE Kconfig option
Add PSP_S0I3_RESUME_VERSTAGE Kconfig option. When enabled, verstage will be run in PSP during S0i3 resume. Setting softfuse bit 40 enables this in PSP. BUG=b:200578885, b:202397678 BRANCH=None TEST=Verstage runs during s0i3 resume on Nipperkin Change-Id: I2c185f787c1e77bd09f6cbbb1f47deb665ed0c79 Signed-off-by: Rob Barnes <robbarnes@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60024 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src/soc/amd/common/psp_verstage/Kconfig')
-rw-r--r--src/soc/amd/common/psp_verstage/Kconfig11
1 files changed, 9 insertions, 2 deletions
diff --git a/src/soc/amd/common/psp_verstage/Kconfig b/src/soc/amd/common/psp_verstage/Kconfig
index 6cac8b70ed78..45a5d2242305 100644
--- a/src/soc/amd/common/psp_verstage/Kconfig
+++ b/src/soc/amd/common/psp_verstage/Kconfig
@@ -6,10 +6,17 @@ config PSP_VERSTAGE_CCP_DMA
accessing the boot device. Select it on platforms which supports
using CCP DMA to access the boot device.
+config PSP_S0I3_RESUME_VERSTAGE
+ bool "S0i3 resume verstage"
+ depends on VBOOT_STARTS_BEFORE_BOOTBLOCK
+ default n
+ help
+ Select this item to enable running verstage during S0i3 resume.
+
config PSP_INIT_TPM_ON_S0I3_RESUME
bool
- depends on TPM2 && VBOOT_STARTS_BEFORE_BOOTBLOCK
- default VBOOT_STARTS_BEFORE_BOOTBLOCK
+ depends on TPM2 && PSP_S0I3_RESUME_VERSTAGE
+ default PSP_S0I3_RESUME_VERSTAGE
help
If the TPM is reset while in S0i3, it must be reinitialized
during s0i3 resume. This must be performed in PSP verstage since