diff options
author | Felix Held <felix-coreboot@felixheld.de> | 2024-01-30 15:15:31 +0100 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2024-02-01 11:38:10 +0000 |
commit | 30f36c35e75a1491edfc629766c146707dcb22f5 (patch) | |
tree | 8dd839a7e2e39b668ef67ef3a147761935bd675a /src/soc/amd/common | |
parent | 5ab978f5ded4a0d964b548d6cb25ac4a9cc7683b (diff) | |
download | coreboot-30f36c35e75a1491edfc629766c146707dcb22f5.tar.gz coreboot-30f36c35e75a1491edfc629766c146707dcb22f5.tar.bz2 coreboot-30f36c35e75a1491edfc629766c146707dcb22f5.zip |
soc/amd: rework DRAM and fixed resource reporting
Introduce read_soc_memmap_resources which gets called by
amd_pci_domain_read_resources for the first domain of the SoC to report
the DRAM and PCI config space access resources to the allocator. For
Genoa this allows to use amd_pci_domain_read_resources as read_resources
in the genoa_pci_domain_ops instead of needing to wrap that call to be
able to call add_opensil_memmap for the first domain. For the other
family 17h+ SoCs the moves the reporting of the DRAM resources and the
PCI config space access resources from the northbridge device to the
domain device.
TEST=Resources still get reported on Mandolin, but now under the domain
instead of the northbridge PCI device
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ib19fd94e06fa3a1d95ade7fafe22db013045a942
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80268
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/common')
-rw-r--r-- | src/soc/amd/common/block/data_fabric/domain.c | 5 | ||||
-rw-r--r-- | src/soc/amd/common/block/include/amdblocks/root_complex.h | 2 |
2 files changed, 7 insertions, 0 deletions
diff --git a/src/soc/amd/common/block/data_fabric/domain.c b/src/soc/amd/common/block/data_fabric/domain.c index 8533dffcc4e8..65735574d10d 100644 --- a/src/soc/amd/common/block/data_fabric/domain.c +++ b/src/soc/amd/common/block/data_fabric/domain.c @@ -200,6 +200,11 @@ void amd_pci_domain_read_resources(struct device *domain) add_data_fabric_mmio_regions(domain, &idx); read_non_pci_resources(domain, &idx); + + /* Only add the SoC's DRAM memory map and fixed resources once */ + if (domain->path.domain.domain == 0) { + read_soc_memmap_resources(domain, &idx); + } } static void write_ssdt_domain_io_producer_range_helper(const char *domain_name, diff --git a/src/soc/amd/common/block/include/amdblocks/root_complex.h b/src/soc/amd/common/block/include/amdblocks/root_complex.h index 0eef5e8ae55a..cac659e756b3 100644 --- a/src/soc/amd/common/block/include/amdblocks/root_complex.h +++ b/src/soc/amd/common/block/include/amdblocks/root_complex.h @@ -22,6 +22,8 @@ struct non_pci_mmio_reg { void read_non_pci_resources(struct device *domain, unsigned long *idx); +void read_soc_memmap_resources(struct device *domain, unsigned long *idx); + uint32_t get_iohc_misc_smn_base(struct device *domain); const struct non_pci_mmio_reg *get_iohc_non_pci_mmio_regs(size_t *count); |