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| author | Raul E Rangel <rrangel@chromium.org> | 2022-01-18 15:50:06 -0700 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-01-26 01:27:17 +0000 |
| commit | a36f9ab04176e2dd4b896d2aa2ef1e552982e571 (patch) | |
| tree | efe3c5d68945dba876c72ae51004e564676ee08b /src/soc/amd/common | |
| parent | 73674a72bcda5cde46ec1b100b1df3dc75c0908b (diff) | |
| download | coreboot-a36f9ab04176e2dd4b896d2aa2ef1e552982e571.tar.gz coreboot-a36f9ab04176e2dd4b896d2aa2ef1e552982e571.tar.bz2 coreboot-a36f9ab04176e2dd4b896d2aa2ef1e552982e571.zip | |
soc/amd/common: Don't reserve VERSTAGE region when using PSP verstage
The VERSTAGE region is only needed when running verstage in the x86.
This change reduces the early ram size by 512 KiB when using PSP
verstage.
BUG=none
TEST=Boot guybrush to OS
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: I45ce421397807dbb1eb48aedd05209b91e89aa4f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61190
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/soc/amd/common')
| -rw-r--r-- | src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld b/src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld index 88a8a604883b..f17043bf2728 100644 --- a/src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld +++ b/src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld @@ -98,7 +98,7 @@ SECTIONS BOOTBLOCK(BOOTBLOCK_ADDR, CONFIG_C_ENV_BOOTBLOCK_SIZE) ROMSTAGE(CONFIG_ROMSTAGE_ADDR, CONFIG_ROMSTAGE_SIZE) REGION(fspm, CONFIG_FSP_M_ADDR, CONFIG_FSP_M_SIZE, 1) -#if CONFIG(VBOOT_SEPARATE_VERSTAGE) +#if CONFIG(VBOOT_SEPARATE_VERSTAGE) && !CONFIG(VBOOT_STARTS_BEFORE_BOOTBLOCK) VERSTAGE(CONFIG_VERSTAGE_ADDR, CONFIG_VERSTAGE_SIZE) #endif |