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| author | Felix Held <felix-coreboot@felixheld.de> | 2024-01-08 23:30:38 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2024-01-11 01:54:49 +0000 |
| commit | aab8a22d9d96c21cd8e482e0960f019682c95931 (patch) | |
| tree | 32a19112ccb211642774bdd5190aca7cda30893d /src/soc/amd/common | |
| parent | a2b2ac0ed2b39ed3ea7972732521e0d731e50671 (diff) | |
| download | coreboot-aab8a22d9d96c21cd8e482e0960f019682c95931.tar.gz coreboot-aab8a22d9d96c21cd8e482e0960f019682c95931.tar.bz2 coreboot-aab8a22d9d96c21cd8e482e0960f019682c95931.zip | |
soc/amd/common/acpi: factor out common MADT code
The acpi_fill_madt implementation from the Genoa PoC also works for the
other AMD SoCs that select SOC_AMD_COMMON_BLOCK_DATA_FABRIC_DOMAIN, so
factor out this function to the common AMD ACPI code and change those
other SoCs to use the new common functionality instead of having their
own implementations.
The old code on the single-domain SoCs used the GNB_IO_APIC_ADDR base
address to create the MADT entry for the additional IOAPIC in the root
complex. The new code iterates over all domains and looks for a resource
with the IOMMU_IOAPIC_IDX index in each domain and if it finds it, it
creates an MADT entry for that IOAPIC. This resource is created earlier
in the boot process when the non-PCI resources are read from the IOHC
registers and reported to the allocator.
TEST=The resulting MADT doesn't change on Mandolin
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I4cc0d3f30b4e6ba29542dcfde84ccac90820d258
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79861
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/common')
| -rw-r--r-- | src/soc/amd/common/block/acpi/Kconfig | 6 | ||||
| -rw-r--r-- | src/soc/amd/common/block/acpi/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/soc/amd/common/block/acpi/madt.c | 20 |
3 files changed, 27 insertions, 0 deletions
diff --git a/src/soc/amd/common/block/acpi/Kconfig b/src/soc/amd/common/block/acpi/Kconfig index 9355f7d455ad..0f0a37111191 100644 --- a/src/soc/amd/common/block/acpi/Kconfig +++ b/src/soc/amd/common/block/acpi/Kconfig @@ -30,6 +30,12 @@ config SOC_AMD_COMMON_BLOCK_ACPI_GPIO config SOC_AMD_COMMON_BLOCK_ACPI_IVRS bool +config SOC_AMD_COMMON_BLOCK_ACPI_MADT + bool + help + Select this to add the common AMD acpi_fill_madt implementation to + the build which adds the MADT entries for all non-FCH IOAPICs. + config ACPI_SSDT_PSD_INDEPENDENT bool "Allow core p-state independent transitions" default y diff --git a/src/soc/amd/common/block/acpi/Makefile.inc b/src/soc/amd/common/block/acpi/Makefile.inc index a0d92907a470..763a3bc61a43 100644 --- a/src/soc/amd/common/block/acpi/Makefile.inc +++ b/src/soc/amd/common/block/acpi/Makefile.inc @@ -12,6 +12,7 @@ ramstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_ACPI_CPPC) += cppc.c ramstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_ACPI_CPU_POWER_STATE) += cpu_power_state.c ramstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_ACPI_GPIO) += gpio.c ramstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_ACPI_IVRS) += ivrs.c +ramstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_ACPI_MADT) += madt.c romstage-y += elog.c ramstage-y += elog.c diff --git a/src/soc/amd/common/block/acpi/madt.c b/src/soc/amd/common/block/acpi/madt.c new file mode 100644 index 000000000000..14fab74b8492 --- /dev/null +++ b/src/soc/amd/common/block/acpi/madt.c @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <acpi/acpi.h> +#include <amdblocks/data_fabric.h> +#include <device/device.h> + +unsigned long acpi_fill_madt(unsigned long current) +{ + struct device *dev = NULL; + while ((dev = dev_find_path(dev, DEVICE_PATH_DOMAIN)) != NULL) { + struct resource *res = probe_resource(dev, IOMMU_IOAPIC_IDX); + if (!res) + continue; + + current += acpi_create_madt_ioapic_from_hw((acpi_madt_ioapic_t *)current, + res->base); + } + + return current; +} |