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| author | Felix Held <felix-coreboot@felixheld.de> | 2024-01-11 22:26:18 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2024-01-16 22:59:55 +0000 |
| commit | 3b5b66d82954e026a91a1eff833fa7f652fed629 (patch) | |
| tree | c7ff2cb87807e204d6f9e04e1cae14516eae0801 /src/soc/amd/genoa_poc | |
| parent | 090ea7ab8fceae54488620160aa95da4292d663f (diff) | |
| download | coreboot-3b5b66d82954e026a91a1eff833fa7f652fed629.tar.gz coreboot-3b5b66d82954e026a91a1eff833fa7f652fed629.tar.bz2 coreboot-3b5b66d82954e026a91a1eff833fa7f652fed629.zip | |
device: Add support for multiple PCI segment groups
Add initial support for multiple PCI segment groups. Instead of
modifying secondary in the bus struct introduce a new segment_group
struct element and keep existing common code.
Since all platforms currently only use 1 segment this is not a
functional change. On platforms that support more than 1 segment the
segment has to be set when creating the PCI domain.
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ied3313c41896362dd989ee2ab1b1bcdced840aa8
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79927
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
Diffstat (limited to 'src/soc/amd/genoa_poc')
| -rw-r--r-- | src/soc/amd/genoa_poc/domain.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/amd/genoa_poc/domain.c b/src/soc/amd/genoa_poc/domain.c index f21cad5b3e0b..dc3745061dd7 100644 --- a/src/soc/amd/genoa_poc/domain.c +++ b/src/soc/amd/genoa_poc/domain.c @@ -18,7 +18,7 @@ static void genoa_domain_read_resources(struct device *domain) amd_pci_domain_read_resources(domain); // We only want to add the DRAM memory map once - if (domain->link_list->secondary == 0) { + if (domain->link_list->secondary == 0 && domain->link_list->segment_group == 0) { /* 0x1000 is a large enough first index to be sure to not overlap with the resources added by amd_pci_domain_read_resources */ add_opensil_memmap(domain, 0x1000); |