summaryrefslogtreecommitdiffstats
path: root/src/soc/amd/picasso/chip.h
diff options
context:
space:
mode:
authorRaul E Rangel <rrangel@chromium.org>2020-12-04 10:29:56 -0700
committerFelix Held <felix-coreboot@felixheld.de>2020-12-09 14:25:19 +0000
commitf56b7842274741503b10b197317eeb28720704be (patch)
treed97f5c344a6fc8fe4cec90a15b5cf9a573e79114 /src/soc/amd/picasso/chip.h
parentb3621f811d226c322fc6b21b583270c6b40e7e4c (diff)
downloadcoreboot-f56b7842274741503b10b197317eeb28720704be.tar.gz
coreboot-f56b7842274741503b10b197317eeb28720704be.tar.bz2
coreboot-f56b7842274741503b10b197317eeb28720704be.zip
soc/amd/picasso: Rename SD_EMMC_EMMC_DDR_52 to SD_EMMC_EMMC_DDR_104
The number at the end actually means the max MiB/s. So 52 MHz clock @ 8x data width, sampled on each clock edge = 104 MiB/s. According to JEDEC Standard No. 84-B51A (JESD84-B51A), maximum bandwidth & clock frequency for various MMC bus speed modes are (at x8 bus width): MMC_Legacy: 26 MB/s at 26 MHz Single Data Rate (SDR) MMC_HS: 52 MB/s at 52 MHz SDR MMC_DDR52: 104 MB/s at 52 MHz Dual Data Rate (DDR) MMC_HS200: 200 MB/s at 200 MHz SDR MMC_HS400: 400 MB/s at 200 MHz DDR BUG=b:159823235 BRANCH=zork TEST=build zork Signed-off-by: Raul E Rangel <rrangel@chromium.org> Change-Id: I7818d8cb5ed5974c60a900477a0aa2ecc904db0c Reviewed-on: https://review.coreboot.org/c/coreboot/+/48309 Reviewed-by: Jason Glenesk <jason.glenesk@gmail.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-by: Rob Barnes <robbarnes@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/picasso/chip.h')
-rw-r--r--src/soc/amd/picasso/chip.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/amd/picasso/chip.h b/src/soc/amd/picasso/chip.h
index 27f1a2ad84e2..c0a64576de07 100644
--- a/src/soc/amd/picasso/chip.h
+++ b/src/soc/amd/picasso/chip.h
@@ -175,7 +175,7 @@ struct soc_amd_picasso_config {
SD_EMMC_SD_UHS_I_SDR_104,
SD_EMMC_EMMC_SDR_26,
SD_EMMC_EMMC_SDR_52,
- SD_EMMC_EMMC_DDR_52,
+ SD_EMMC_EMMC_DDR_104,
SD_EMMC_EMMC_HS200,
SD_EMMC_EMMC_HS400,
SD_EMMC_EMMC_HS300,