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| author | Raul E Rangel <rrangel@chromium.org> | 2021-02-11 11:07:11 -0700 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2021-02-12 20:45:59 +0000 |
| commit | ffab5e64d185cebfbc35e3959382910ddd5ddce8 (patch) | |
| tree | 4f2b1b71d82802268ceee248f6b13a7b2cbff511 /src/soc/amd/picasso/chip.h | |
| parent | 1c88b10be277bb65ebf3f4ff12361c53eb054e01 (diff) | |
| download | coreboot-ffab5e64d185cebfbc35e3959382910ddd5ddce8.tar.gz coreboot-ffab5e64d185cebfbc35e3959382910ddd5ddce8.tar.bz2 coreboot-ffab5e64d185cebfbc35e3959382910ddd5ddce8.zip | |
soc/amd: Move MADT IRQ override settings into common_config
This is another common ACPI setting.
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: Iefecabae1d83996a9a4aaadd2a53c2432441e1b2
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50558
Reviewed-by: Mathew King <mathewk@chromium.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/picasso/chip.h')
| -rw-r--r-- | src/soc/amd/picasso/chip.h | 11 |
1 files changed, 0 insertions, 11 deletions
diff --git a/src/soc/amd/picasso/chip.h b/src/soc/amd/picasso/chip.h index a66d77c89e3d..549f03347a32 100644 --- a/src/soc/amd/picasso/chip.h +++ b/src/soc/amd/picasso/chip.h @@ -120,17 +120,6 @@ struct soc_amd_picasso_config { /* Enable ACP PME (0 = disable, 1 = enable) */ u8 acp_pme_enable; - /** - * IRQ 0 - 15 have a default trigger of edge and default polarity of high. - * If you have a device that requires a different configuration you can override the - * settings here. - */ - struct { - uint8_t irq; - /* See MP_IRQ_* from mpspec.h */ - uint8_t flags; - } irq_override[16]; - /* System config index */ uint8_t system_config; |