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| author | Felix Held <felix-coreboot@felixheld.de> | 2021-06-15 20:57:04 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-06-17 14:21:58 +0000 |
| commit | 361bb53aa2bb6314bf22690f5436af7c096d0e0a (patch) | |
| tree | d0e4682ef6d9c644a4ab80de4a2ceb1eb3b7503c /src/soc/amd/picasso/chipset.cb | |
| parent | ddbc771524a2a127dd51f711b6d88b13884c2164 (diff) | |
| download | coreboot-361bb53aa2bb6314bf22690f5436af7c096d0e0a.tar.gz coreboot-361bb53aa2bb6314bf22690f5436af7c096d0e0a.tar.bz2 coreboot-361bb53aa2bb6314bf22690f5436af7c096d0e0a.zip | |
soc/amd/picasso: introduce and use devicetree aliases for UART0-3
Since the default state of the MMIO UART devices in the chipset
devicetree is off, the mainboard devicetree entries that disable MMIO
UART devices are removed.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I913a587802020ce4e182b48632cdde1104c2a6e6
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55545
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/picasso/chipset.cb')
| -rw-r--r-- | src/soc/amd/picasso/chipset.cb | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/soc/amd/picasso/chipset.cb b/src/soc/amd/picasso/chipset.cb index 0c2fa6040c4a..1730f8d95a87 100644 --- a/src/soc/amd/picasso/chipset.cb +++ b/src/soc/amd/picasso/chipset.cb @@ -46,4 +46,8 @@ chip soc/amd/picasso device mmio 0xfedc4000 alias i2c_2 off end device mmio 0xfedc5000 alias i2c_3 off end + device mmio 0xfedc9000 alias uart_0 off end + device mmio 0xfedca000 alias uart_1 off end + device mmio 0xfedce000 alias uart_2 off end + device mmio 0xfedcf000 alias uart_3 off end end |