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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2021-01-22 14:31:36 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-01-23 20:21:14 +0000 |
| commit | 10f7f997ad439681b959962682cafc1993677c56 (patch) | |
| tree | 6c446991e17796acf2c95fb9082135b728bfa14c /src/soc/amd/picasso/fch.c | |
| parent | ac0dc4a8401e4531aa60a56d9ad4dfa0450eca78 (diff) | |
| download | coreboot-10f7f997ad439681b959962682cafc1993677c56.tar.gz coreboot-10f7f997ad439681b959962682cafc1993677c56.tar.bz2 coreboot-10f7f997ad439681b959962682cafc1993677c56.zip | |
soc/amd: Rename chipset_state to chipset_power_state
To implement some common helpers for CBMEM_ID_POWER_STATE
allocation use the same struct name as soc/intel.
Change-Id: I5d2c06a2a7b4602374562197c99b0ad7bcf50afb
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49835
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/soc/amd/picasso/fch.c')
| -rw-r--r-- | src/soc/amd/picasso/fch.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/amd/picasso/fch.c b/src/soc/amd/picasso/fch.c index b18fac4fbc12..730e636e57da 100644 --- a/src/soc/amd/picasso/fch.c +++ b/src/soc/amd/picasso/fch.c @@ -205,7 +205,7 @@ static void gpp_clk_setup(void) void southbridge_init(void *chip_info) { - struct chipset_state *state; + struct chipset_power_state *state; i2c_soc_init(); sb_init_acpi_ports(); |