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| author | Felix Held <felix-coreboot@felixheld.de> | 2021-02-10 19:53:38 +0100 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2021-02-11 17:01:11 +0000 |
| commit | 5dd52c77f7980e60d659133e6815f9e0a463759e (patch) | |
| tree | cb68355063b3b8276b4100c4e899f592a5921073 /src/soc/amd/picasso/fch.c | |
| parent | ea120f96c9f0d8ca750d55dbd911e04c694dd736 (diff) | |
| download | coreboot-5dd52c77f7980e60d659133e6815f9e0a463759e.tar.gz coreboot-5dd52c77f7980e60d659133e6815f9e0a463759e.tar.bz2 coreboot-5dd52c77f7980e60d659133e6815f9e0a463759e.zip | |
soc/amd/picasso/fch: remove comment about ForceStpClkRetry
The corresponding bit is marked as reserved in the PPR. Also there's no
BKDG for Picasso any more; the BKDG was mostly replaced by the PPR. Also
fix the style of the comment.
Change-Id: Iffdbb9e951cb140e4352ab0f198f72a71ba798dc
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50495
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/picasso/fch.c')
| -rw-r--r-- | src/soc/amd/picasso/fch.c | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/src/soc/amd/picasso/fch.c b/src/soc/amd/picasso/fch.c index 5d62e8eae98e..e52090a28310 100644 --- a/src/soc/amd/picasso/fch.c +++ b/src/soc/amd/picasso/fch.c @@ -135,9 +135,7 @@ static void fch_init_acpi_ports(void) configure_smi(SMITYPE_SMI_CMD_PORT, SMI_MODE_SMI); /* SMI on SlpTyp requires sending SMI before completion - * response of the I/O write. The BKDG also specifies - * clearing ForceStpClkRetry for SMI trapping. - */ + response of the I/O write. */ reg = pm_read32(PM_PCI_CTRL); reg |= FORCE_SLPSTATE_RETRY; pm_write32(PM_PCI_CTRL, reg); |