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| author | Marshall Dawson <marshalldawson3rd@gmail.com> | 2019-06-13 15:59:38 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2019-07-03 21:57:10 +0000 |
| commit | 9df03a168fd54bc8e872448ff9fdfa30313c40ba (patch) | |
| tree | 77ef54a8c620b19ea4fc35a58d88e36db53e49a0 /src/soc/amd/picasso/include/soc/iomap.h | |
| parent | a392b00131d1ddc8489bf24c2eb7a14300374680 (diff) | |
| download | coreboot-9df03a168fd54bc8e872448ff9fdfa30313c40ba.tar.gz coreboot-9df03a168fd54bc8e872448ff9fdfa30313c40ba.tar.bz2 coreboot-9df03a168fd54bc8e872448ff9fdfa30313c40ba.zip | |
soc/amd/picasso: Remove all PSP runtime functions
Remove the mailbox call to notify the PSP that DRAM is ready. This
is not supported on Family 17h.
Remove the selectable SMU firmware. This is a feature of the PSP
bootloader and the standard bootloader doesn't contain the ability.
Clean up additional mentions of PSP within picasso.
Change-Id: I8abeb4c375dbff3b438cd18ccaaf66e11c86e72e
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33754
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Diffstat (limited to 'src/soc/amd/picasso/include/soc/iomap.h')
| -rw-r--r-- | src/soc/amd/picasso/include/soc/iomap.h | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/soc/amd/picasso/include/soc/iomap.h b/src/soc/amd/picasso/include/soc/iomap.h index ad76f3a83d11..1d89fd7ec09d 100644 --- a/src/soc/amd/picasso/include/soc/iomap.h +++ b/src/soc/amd/picasso/include/soc/iomap.h @@ -18,7 +18,6 @@ #define __SOC_PICASSO_IOMAP_H__ /* MMIO Ranges */ -#define PSP_MAILBOX_BAR3_BASE 0xf0a00000 #define SPI_BASE_ADDRESS 0xfec10000 #define IO_APIC2_ADDR 0xfec20000 |