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| author | Raul E Rangel <rrangel@chromium.org> | 2021-05-07 11:36:23 -0600 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-05-09 18:08:43 +0000 |
| commit | 1d1dbc4cfabf569b7d352dbcb5cee686fd5882d5 (patch) | |
| tree | 31501c256d9292b496ee20402af0ccff1979a4be /src/soc/amd/picasso/pcie_gpp.c | |
| parent | a8405a4c4a82ceee4dc2dd8a9ad0b0a80aa4abef (diff) | |
| download | coreboot-1d1dbc4cfabf569b7d352dbcb5cee686fd5882d5.tar.gz coreboot-1d1dbc4cfabf569b7d352dbcb5cee686fd5882d5.tar.bz2 coreboot-1d1dbc4cfabf569b7d352dbcb5cee686fd5882d5.zip | |
soc/amd/{picasso,common/blocks/pci}: Move populate_pirq_data
The method now dynamically allocates the pirq structure and uses the
get_pci_routing_table method.
BUG=b:184766519
TEST=Build guybrush and verify picasso SSDT has not changed.
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: I297fc3ca7227fb4794ac70bd046ce2f93da8b869
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52913
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/soc/amd/picasso/pcie_gpp.c')
| -rw-r--r-- | src/soc/amd/picasso/pcie_gpp.c | 29 |
1 files changed, 0 insertions, 29 deletions
diff --git a/src/soc/amd/picasso/pcie_gpp.c b/src/soc/amd/picasso/pcie_gpp.c index f609875a6165..15174f6f7403 100644 --- a/src/soc/amd/picasso/pcie_gpp.c +++ b/src/soc/amd/picasso/pcie_gpp.c @@ -31,35 +31,6 @@ const struct pci_routing_info *get_pci_routing_table(size_t *entries) return pci_routing_table; } -/* - * This data structure is populated from the raw data above. It is used - * by amd/common/block/pci/amd_pci_util to write the PCI_INT_LINE register - * to each PCI device. - */ -static struct pirq_struct pirq_data[ARRAY_SIZE(pci_routing_table)]; - -void populate_pirq_data(void) -{ - const struct pci_routing_info *pci_routing; - struct pirq_struct *pirq; - unsigned int irq_index; - - for (size_t i = 0; i < ARRAY_SIZE(pirq_data); ++i) { - pirq = &pirq_data[i]; - pci_routing = &pci_routing_table[i]; - - pirq->devfn = pci_routing->devfn; - for (size_t j = 0; j < 4; ++j) { - irq_index = pci_calculate_irq(pci_routing, j); - - pirq->PIN[j] = irq_index % 8; - } - } - - pirq_data_ptr = pirq_data; - pirq_data_size = ARRAY_SIZE(pirq_data); -} - static const char *pcie_gpp_acpi_name(const struct device *dev) { if (dev->path.type != DEVICE_PATH_PCI) |