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authorRaul E Rangel <rrangel@chromium.org>2022-02-03 15:33:24 -0700
committerRaul Rangel <rrangel@chromium.org>2022-02-08 16:18:21 +0000
commit2aa5618871d9e558650e33d7911d43daad6019a4 (patch)
tree1a8dec6a5291c48af484d421a2bf6deecb06e5bb /src/soc/amd/picasso/psp_verstage
parent1828a541f158b0c518a4f6cfef6108a1fc4b885b (diff)
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soc/amd/picasso/psp_verstage: Implement get_uart_base
The Picasso PSP doesn't support mapping the UART, so add a dummy function to return NULL. BUG=b:215599230 TEST=Build and boot morphius Signed-off-by: Raul E Rangel <rrangel@chromium.org> Change-Id: Ie1f033ff86ebb0f755a9a0b6ff293aa3c8bbbeb6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/61608 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Diffstat (limited to 'src/soc/amd/picasso/psp_verstage')
-rw-r--r--src/soc/amd/picasso/psp_verstage/Makefile.inc1
-rw-r--r--src/soc/amd/picasso/psp_verstage/uart.c11
2 files changed, 12 insertions, 0 deletions
diff --git a/src/soc/amd/picasso/psp_verstage/Makefile.inc b/src/soc/amd/picasso/psp_verstage/Makefile.inc
index 41296c9b0c2f..82d8efa81853 100644
--- a/src/soc/amd/picasso/psp_verstage/Makefile.inc
+++ b/src/soc/amd/picasso/psp_verstage/Makefile.inc
@@ -5,6 +5,7 @@ verstage-generic-ccopts += -I$(src)/vendorcode/amd/fsp/picasso/include
verstage-y += svc.c
verstage-y += chipset.c
+verstage-y += uart.c
verstage-y += $(top)/src/vendorcode/amd/fsp/picasso/bl_uapp/bl_uapp_startup.S
verstage-y += $(top)/src/vendorcode/amd/fsp/picasso/bl_uapp/bl_uapp_end.S
diff --git a/src/soc/amd/picasso/psp_verstage/uart.c b/src/soc/amd/picasso/psp_verstage/uart.c
new file mode 100644
index 000000000000..1c89f10c9928
--- /dev/null
+++ b/src/soc/amd/picasso/psp_verstage/uart.c
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <bl_uapp/bl_syscall_public.h>
+#include <amdblocks/uart.h>
+#include <types.h>
+
+uintptr_t get_uart_base(unsigned int idx)
+{
+ /* Mapping the UART is not supported. */
+ return 0;
+}