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| author | Felix Held <felix.held@amd.corp-partner.google.com> | 2020-06-26 18:03:53 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2020-06-28 14:16:36 +0000 |
| commit | 42b0e8f4382fc872ee07af0568dbda75602aa251 (patch) | |
| tree | 7fbaf0191e4ec9f8edd0f939cd6a1395aa3f11c6 /src/soc/amd/picasso/soc_util.c | |
| parent | fa8b75fb17ccd739d3e08a184a014d7dca35d3ce (diff) | |
| download | coreboot-42b0e8f4382fc872ee07af0568dbda75602aa251.tar.gz coreboot-42b0e8f4382fc872ee07af0568dbda75602aa251.tar.bz2 coreboot-42b0e8f4382fc872ee07af0568dbda75602aa251.zip | |
soc/amd/picasso/soc_util: rework reduced I/O chip detection
Both Dali and Pollock chips have less PCIe, USB3 and DisplayPort
connectivity. While Dali can either be fused-down PCO or RV2 silicon,
Pollock is always RV2 silicon.
Since we have all boards using this code in tree right now,
soc_is_dali() can be renamed and generalized to soc_is_reduced_io_sku().
Change-Id: I9eb57595da6f806305552128b0c077ceeb7c4661
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42833
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Rob Barnes <robbarnes@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/picasso/soc_util.c')
| -rw-r--r-- | src/soc/amd/picasso/soc_util.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/amd/picasso/soc_util.c b/src/soc/amd/picasso/soc_util.c index 2aa9daa2bc3e..64a97a059e7d 100644 --- a/src/soc/amd/picasso/soc_util.c +++ b/src/soc/amd/picasso/soc_util.c @@ -199,9 +199,9 @@ void print_soc_type(void) } } -bool soc_is_dali(void) +bool soc_is_reduced_io_sku(void) { - return get_soc_type() == SOC_DALI; + return get_silicon_type() == SILICON_RV2 || get_soc_type() == SOC_DALI; } bool soc_is_raven2(void) |