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authorRaul E Rangel <rrangel@chromium.org>2020-06-11 14:06:11 -0600
committerPatrick Georgi <pgeorgi@google.com>2020-06-14 16:53:20 +0000
commitd53c281d0beeabcfafd4b2682fbd0c01ae88ac10 (patch)
tree4747adbb7b45b68efe5556e2273b5b2283d172dc /src/soc/amd/picasso/southbridge.c
parent4f5936b45652cea97f964678c93083b0a4f2e478 (diff)
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soc/amd/picasso: Move aoac functions to new file
This functionality is needed in the PSP and I can't include all of southbridge.c. BUG=b:153001807 TEST=Made sure trembyle still compiles Signed-off-by: Raul E Rangel <rrangel@chromium.org> Change-Id: I3a38c655588d7836e1bd033e958a505774de871e Reviewed-on: https://review.coreboot.org/c/coreboot/+/42324 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/picasso/southbridge.c')
-rw-r--r--src/soc/amd/picasso/southbridge.c81
1 files changed, 0 insertions, 81 deletions
diff --git a/src/soc/amd/picasso/southbridge.c b/src/soc/amd/picasso/southbridge.c
index d2904d894bee..54128abe5d34 100644
--- a/src/soc/amd/picasso/southbridge.c
+++ b/src/soc/amd/picasso/southbridge.c
@@ -28,30 +28,6 @@
#include <types.h>
#include "chip.h"
-#define FCH_AOAC_UART_FOR_CONSOLE \
- (CONFIG_UART_FOR_CONSOLE == 0 ? FCH_AOAC_DEV_UART0 \
- : CONFIG_UART_FOR_CONSOLE == 1 ? FCH_AOAC_DEV_UART1 \
- : CONFIG_UART_FOR_CONSOLE == 2 ? FCH_AOAC_DEV_UART2 \
- : CONFIG_UART_FOR_CONSOLE == 3 ? FCH_AOAC_DEV_UART3 \
- : -1)
-#if FCH_AOAC_UART_FOR_CONSOLE == -1
-# error Unsupported UART_FOR_CONSOLE chosen
-#endif
-
-/*
- * Table of devices that need their AOAC registers enabled and waited
- * upon (usually about .55 milliseconds). Instead of individual delays
- * waiting for each device to become available, a single delay will be
- * executed. The console UART is handled separately from this table.
- */
-const static int aoac_devs[] = {
- FCH_AOAC_DEV_AMBA,
- FCH_AOAC_DEV_I2C2,
- FCH_AOAC_DEV_I2C3,
- FCH_AOAC_DEV_I2C4,
- FCH_AOAC_DEV_ESPI,
-};
-
/*
* Table of APIC register index and associated IRQ name. Using IDX_XXX_NAME
* provides a visible association with the index, therefore helping
@@ -111,63 +87,6 @@ const struct irq_idx_name *sb_get_apic_reg_association(size_t *size)
return irq_association;
}
-static void power_on_aoac_device(int dev)
-{
- uint8_t byte;
-
- /* Power on the UART and AMBA devices */
- byte = aoac_read8(AOAC_DEV_D3_CTL(dev));
- byte |= FCH_AOAC_PWR_ON_DEV;
- aoac_write8(AOAC_DEV_D3_CTL(dev), byte);
-}
-
-static bool is_aoac_device_enabled(int dev)
-{
- uint8_t byte;
-
- byte = aoac_read8(AOAC_DEV_D3_STATE(dev));
- byte &= (FCH_AOAC_PWR_RST_STATE | FCH_AOAC_RST_CLK_OK_STATE);
- if (byte == (FCH_AOAC_PWR_RST_STATE | FCH_AOAC_RST_CLK_OK_STATE))
- return true;
- else
- return false;
-}
-
-static void enable_aoac_console_uart(void)
-{
- if (!CONFIG(PICASSO_UART))
- return;
-
- power_on_aoac_device(FCH_AOAC_UART_FOR_CONSOLE);
-}
-
-static bool is_aoac_console_uart_enabled(void)
-{
- if (!CONFIG(PICASSO_UART))
- return true;
-
- return is_aoac_device_enabled(FCH_AOAC_UART_FOR_CONSOLE);
-}
-
-void enable_aoac_devices(void)
-{
- bool status;
- int i;
-
- for (i = 0; i < ARRAY_SIZE(aoac_devs); i++)
- power_on_aoac_device(aoac_devs[i]);
- enable_aoac_console_uart();
-
- /* Wait for AOAC devices to indicate power and clock OK */
- do {
- udelay(100);
- status = true;
- for (i = 0; i < ARRAY_SIZE(aoac_devs); i++)
- status &= is_aoac_device_enabled(aoac_devs[i]);
- status &= is_aoac_console_uart_enabled();
- } while (!status);
-}
-
static void sb_enable_cf9_io(void)
{
uint32_t reg = pm_read32(PM_DECODE_EN);