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| author | Matt DeVillier <matt.devillier@gmail.com> | 2022-06-18 15:32:39 -0500 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-06-22 17:32:19 +0000 |
| commit | 619bb074945bd5acabd0588dcb1371b8c94108d2 (patch) | |
| tree | 74b1e1a22a3b474703187a2687b782a1a419f2d0 /src/soc/amd/picasso | |
| parent | 7b4643f5fa170d49217ace787bd00fba0b6c1acc (diff) | |
| download | coreboot-619bb074945bd5acabd0588dcb1371b8c94108d2.tar.gz coreboot-619bb074945bd5acabd0588dcb1371b8c94108d2.tar.bz2 coreboot-619bb074945bd5acabd0588dcb1371b8c94108d2.zip | |
soc/amd/picasso/acpi: Add missing UART resources
Both UART and DMA MMIO regions for each UART are mapped by the
UEFI reference code, so do the same here.
Without these defined, UART-attached devices fail to correctly
initialize under Windows.
Change-Id: I0e1af9028c7c1746407e923cebe824a15aeb565e
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65233
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/soc/amd/picasso')
| -rw-r--r-- | src/soc/amd/picasso/acpi/sb_fch.asl | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/src/soc/amd/picasso/acpi/sb_fch.asl b/src/soc/amd/picasso/acpi/sb_fch.asl index cbea9d92f305..bc14930fa8f1 100644 --- a/src/soc/amd/picasso/acpi/sb_fch.asl +++ b/src/soc/amd/picasso/acpi/sb_fch.asl @@ -107,6 +107,7 @@ Device (FUR0) Exclusive, , , IRQR) { 0 } Memory32Fixed (ReadWrite, APU_UART0_BASE, 0x1000) + Memory32Fixed (ReadWrite, APU_DMAC0_BASE, 0x1000) } CreateDWordField (Local0, IRQR._INT, IRQN) If (PICM) { @@ -117,6 +118,7 @@ Device (FUR0) If (IRQN == 0x1f) { Return (ResourceTemplate() { Memory32Fixed (ReadWrite, APU_UART0_BASE, 0x1000) + Memory32Fixed (ReadWrite, APU_DMAC0_BASE, 0x1000) }) } Else { Return (Local0) @@ -138,6 +140,7 @@ Device (FUR1) { Exclusive, , , IRQR) { 0 } Memory32Fixed (ReadWrite, APU_UART1_BASE, 0x1000) + Memory32Fixed (ReadWrite, APU_DMAC1_BASE, 0x1000) } CreateDWordField (Local0, IRQR._INT, IRQN) If (PICM) { @@ -148,6 +151,7 @@ Device (FUR1) { If (IRQN == 0x1f) { Return (ResourceTemplate() { Memory32Fixed (ReadWrite, APU_UART1_BASE, 0x1000) + Memory32Fixed (ReadWrite, APU_DMAC1_BASE, 0x1000) }) } Else { Return (Local0) @@ -169,6 +173,7 @@ Device (FUR2) { Exclusive, , , IRQR) { 0 } Memory32Fixed (ReadWrite, APU_UART2_BASE, 0x1000) + Memory32Fixed (ReadWrite, APU_DMAC2_BASE, 0x1000) } CreateDWordField (Local0, IRQR._INT, IRQN) If (PICM) { @@ -179,6 +184,7 @@ Device (FUR2) { If (IRQN == 0x1f) { Return (ResourceTemplate() { Memory32Fixed (ReadWrite, APU_UART2_BASE, 0x1000) + Memory32Fixed (ReadWrite, APU_DMAC2_BASE, 0x1000) }) } Else { Return (Local0) @@ -200,6 +206,7 @@ Device (FUR3) { Exclusive, , , IRQR) { 0 } Memory32Fixed (ReadWrite, APU_UART3_BASE, 0x1000) + Memory32Fixed (ReadWrite, APU_DMAC3_BASE, 0x1000) } CreateDWordField (Local0, IRQR._INT, IRQN) If (PICM) { @@ -210,6 +217,7 @@ Device (FUR3) { If (IRQN == 0x1f) { Return (ResourceTemplate() { Memory32Fixed (ReadWrite, APU_UART3_BASE, 0x1000) + Memory32Fixed (ReadWrite, APU_DMAC3_BASE, 0x1000) }) } Else { Return (Local0) |