soc/amd/picasso: add eMMC MMIO device to devicetree

Add the eMMC MMIO device to the devicetree and make it use the common
AMD eMMC driver. Since there is now a device for this in the devicetree,
also use this device to determine if the FSP should be told if the eMMC
controller is supposed to be disabled.

TEST=On Mandolin the eMMC controller both disappears in the Windows 10
     device manager and in dmesg on Ubuntu 2022.04 LTS
TEST=Morphius with NVMe SSD still works

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I5453b69df776d2ce1f3be11e37cd26c8c64f0cd5
Reviewed-on: https://review.coreboot.org/c/coreboot/+/77990
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>

5 files changed, 12 insertions, 1 deletions

diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig
index 79f60cece7e2..796fe4eb1333 100644
--- a/src/soc/amd/picasso/Kconfig
+++ b/src/soc/amd/picasso/Kconfig
@@ -37,6 +37,7 @@ config SOC_AMD_PICASSO
 	select SOC_AMD_COMMON_BLOCK_DATA_FABRIC
 	select SOC_AMD_COMMON_BLOCK_DATA_FABRIC_DOMAIN
 	select SOC_AMD_COMMON_BLOCK_DATA_FABRIC_NP_REGION
+	select SOC_AMD_COMMON_BLOCK_EMMC
 	select SOC_AMD_COMMON_BLOCK_GRAPHICS
 	select SOC_AMD_COMMON_BLOCK_HAS_ESPI
 	select SOC_AMD_COMMON_BLOCK_HDA
diff --git a/src/soc/amd/picasso/acpi/mmio.asl b/src/soc/amd/picasso/acpi/mmio.asl
index f8f9d35489cb..8adc87d6d06e 100644
--- a/src/soc/amd/picasso/acpi/mmio.asl
+++ b/src/soc/amd/picasso/acpi/mmio.asl
@@ -87,9 +87,10 @@ Device (MMC0)
 		}
 	}
 
+	Name (STAT, 0x0)
 	Method (_STA, 0x0, NotSerialized)
 	{
-		Return (0x0F)
+		Return (STAT)
 	}
 }
 
diff --git a/src/soc/amd/picasso/chip.h b/src/soc/amd/picasso/chip.h
index 3320350ee1c5..0b6596090c32 100644
--- a/src/soc/amd/picasso/chip.h
+++ b/src/soc/amd/picasso/chip.h
@@ -177,6 +177,9 @@ struct soc_amd_picasso_config {
 		 *  HS400 -> NONE (0x05)
 		 *
 		 * The kernel driver uses a heuristic to determine if HS400 is supported.
+		 *
+		 * If the eMMC MMIO device is disabled in the devicetree,
+		 * fsps_update_emmc_config will set timing to SD_EMMC_DISABLE.
 		*/
 		enum {
 			SD_EMMC_DISABLE,
diff --git a/src/soc/amd/picasso/chipset.cb b/src/soc/amd/picasso/chipset.cb
index bf2c879a2326..ed545638e8b7 100644
--- a/src/soc/amd/picasso/chipset.cb
+++ b/src/soc/amd/picasso/chipset.cb
@@ -57,4 +57,5 @@ chip soc/amd/picasso
 	device mmio 0xfedca000 alias uart_1 off ops amd_uart_mmio_ops end
 	device mmio 0xfedce000 alias uart_2 off ops amd_uart_mmio_ops end
 	device mmio 0xfedcf000 alias uart_3 off ops amd_uart_mmio_ops end
+	device mmio 0xfedd5000 alias emmc off ops amd_emmc_mmio_ops end
 end
diff --git a/src/soc/amd/picasso/fsp_s_params.c b/src/soc/amd/picasso/fsp_s_params.c
index 2e1055592ae5..f69245d0c808 100644
--- a/src/soc/amd/picasso/fsp_s_params.c
+++ b/src/soc/amd/picasso/fsp_s_params.c
@@ -56,6 +56,11 @@ static void fsps_update_emmc_config(FSP_S_CONFIG *scfg,
 		break;
 	}
 
+	/* Make sure that the FSP knows that the EMMC controller should be disabled when the
+	   corresponding MMIO device is disabled */
+	if (!DEV_PTR(emmc)->enabled)
+		val = SD_DISABLE;
+
 	scfg->emmc0_mode = val;
 	scfg->emmc0_sdr104_hs400_driver_strength =
 		cfg->emmc_config.sdr104_hs400_driver_strength;