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authorFelix Held <felix-coreboot@felixheld.de>2022-03-02 23:02:31 +0100
committerFelix Held <felix-coreboot@felixheld.de>2022-03-03 22:45:28 +0000
commitb1197af7f5aa18b17160f0c5fba9869482891cd2 (patch)
tree21db49d4df0d514bf3ea77e298689b397841330e /src/soc/amd/picasso
parent56b037b857e17691dfb528f969772a8acb28b2c4 (diff)
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soc/amd/*/northbridge,root_complex: simplify GNB IOAPIC resource index
In the northbridge's and root complex' read_resources function, the GNB IOAPIC resource used MMIO base address of the GNB IOAPIC as index which might be misleading. Instead use idx++ as a unique index for this resource. TEST=Resource allocator doesn't complain and no related warnings or errors in dmesg. The update_constraints console output changes like expected: Before: PCI: 00:00.0 fec01000 base fec01000 limit fec01fff mem (fixed) After: PCI: 00:00.0 0d base fec01000 limit fec01fff mem (fixed) Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I8061364879d772469882fc060f92676de6f600a9 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62546 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src/soc/amd/picasso')
-rw-r--r--src/soc/amd/picasso/root_complex.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/amd/picasso/root_complex.c b/src/soc/amd/picasso/root_complex.c
index 076588e4f91d..a3a3d4ba6440 100644
--- a/src/soc/amd/picasso/root_complex.c
+++ b/src/soc/amd/picasso/root_complex.c
@@ -166,7 +166,7 @@ static void read_resources(struct device *dev)
}
/* GNB IOAPIC resource */
- gnb_apic = new_resource(dev, GNB_IO_APIC_ADDR);
+ gnb_apic = new_resource(dev, idx++);
gnb_apic->base = GNB_IO_APIC_ADDR;
gnb_apic->size = 0x00001000;
gnb_apic->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;