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| author | Ritul Guru <ritul.bits@gmail.com> | 2022-07-06 15:17:38 +0530 |
|---|---|---|
| committer | Martin L Roth <gaumless@tutanota.com> | 2022-07-16 22:43:07 +0000 |
| commit | c58f67441194f7fc80f0a24794d5af907c25f332 (patch) | |
| tree | 11f0208f08997c020039a1ce8a92fce9679786a0 /src/soc/amd/picasso | |
| parent | 106def9645e8296751cbed7fb9b229db2376d6be (diff) | |
| download | coreboot-c58f67441194f7fc80f0a24794d5af907c25f332.tar.gz coreboot-c58f67441194f7fc80f0a24794d5af907c25f332.tar.bz2 coreboot-c58f67441194f7fc80f0a24794d5af907c25f332.zip | |
soc/amd/picasso: Add MP2 I2C0 and I2C1 controller ACPI devices
This change is to allow AMD MP2 I2C OS driver to access
I2C0/1 devices when MP2 firmware is loaded.
Change-Id: Iaf25eb4dcf949e4b512ec0e86dbe5ccbc91c3d24
Signed-off-by: Ritul Guru <ritul.bits@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65673
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/picasso')
| -rw-r--r-- | src/soc/amd/picasso/acpi/sb_fch.asl | 74 | ||||
| -rw-r--r-- | src/soc/amd/picasso/include/soc/iomap.h | 2 |
2 files changed, 76 insertions, 0 deletions
diff --git a/src/soc/amd/picasso/acpi/sb_fch.asl b/src/soc/amd/picasso/acpi/sb_fch.asl index bc14930fa8f1..7ab3b17fcbdf 100644 --- a/src/soc/amd/picasso/acpi/sb_fch.asl +++ b/src/soc/amd/picasso/acpi/sb_fch.asl @@ -227,6 +227,80 @@ Device (FUR3) { AOAC_DEVICE(FCH_AOAC_DEV_UART3, 0) } +#if CONFIG(PSP_LOAD_MP2_FW) +Device (I2C0) { + Name (_HID, "AMDI0011") + Name (_UID, 0x0) + Method (_CRS, 0) { + Local0 = ResourceTemplate() { + Interrupt ( + ResourceConsumer, + Edge, + ActiveHigh, + Exclusive, , , IRQR) + { 0 } + Memory32Fixed (ReadWrite, APU_I2C0_BASE, 0x1000) + } + CreateDWordField (Local0, IRQR._INT, IRQN) + If (PICM) { + IRQN = II20 + } Else { + IRQN = PI20 + } + If (IRQN == 0x1f) { + Return (ResourceTemplate() { + Memory32Fixed (ReadWrite, APU_I2C0_BASE, 0x1000) + }) + } Else { + Return (Local0) + } + } + + Method (_STA, 0x0, NotSerialized) + { + Return (0x0F) + } + + AOAC_DEVICE(5, 0) +} + +Device (I2C1) { + Name (_HID, "AMDI0011") + Name (_UID, 0x1) + Method (_CRS, 0) { + Local0 = ResourceTemplate() { + Interrupt ( + ResourceConsumer, + Edge, + ActiveHigh, + Exclusive, , , IRQR) + { 0 } + Memory32Fixed (ReadWrite, APU_I2C1_BASE, 0x1000) + } + CreateDWordField (Local0, IRQR._INT, IRQN) + If (PICM) { + IRQN = II21 + } Else { + IRQN = PI21 + } + If (IRQN == 0x1f) { + Return (ResourceTemplate() { + Memory32Fixed (ReadWrite, APU_I2C1_BASE, 0x1000) + }) + } Else { + Return (Local0) + } + } + + Method (_STA, 0x0, NotSerialized) + { + Return (0x0F) + } + + AOAC_DEVICE(6, 0) +} +#endif /* CONFIG(PSP_LOAD_MP2_FW) */ + Device (I2C2) { Name (_HID, "AMDI0010") Name (_UID, 0x2) diff --git a/src/soc/amd/picasso/include/soc/iomap.h b/src/soc/amd/picasso/include/soc/iomap.h index 853008bcbc59..d6b46b7fa780 100644 --- a/src/soc/amd/picasso/include/soc/iomap.h +++ b/src/soc/amd/picasso/include/soc/iomap.h @@ -39,6 +39,8 @@ #if ENV_X86 +#define APU_I2C0_BASE 0xfedc2000 +#define APU_I2C1_BASE 0xfedc3000 #define APU_I2C2_BASE 0xfedc4000 #define APU_I2C3_BASE 0xfedc5000 #define APU_I2C4_BASE 0xfedc6000 |