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| author | Karthikeyan Ramasubramanian <kramasub@google.com> | 2022-08-04 14:16:38 -0600 |
|---|---|---|
| committer | Martin L Roth <gaumless@gmail.com> | 2022-08-07 19:45:00 +0000 |
| commit | b2af2e35f40e55cb07d6fb696e428fbe68ba2d3d (patch) | |
| tree | 86541772349877ad7ce06b9240acc08a42ad36d3 /src/soc/amd/sabrina/Kconfig | |
| parent | 8b1c6c6cb384c89659abbd043c2566df358d8f95 (diff) | |
| download | coreboot-b2af2e35f40e55cb07d6fb696e428fbe68ba2d3d.tar.gz coreboot-b2af2e35f40e55cb07d6fb696e428fbe68ba2d3d.tar.bz2 coreboot-b2af2e35f40e55cb07d6fb696e428fbe68ba2d3d.zip | |
soc/amd/sabrina: Enable PSP Crypto Co-Processor (CCP) DMA
Boot issue while using FW slot A has been root-caused to the usage of
same TLB to map HW Crypto engines and SPI flash. With upcoming PSP
release, this TLB usage conflict has been resolved. Hence enable CCP
DMA.
BUG=b:240175446
TEST=Build and boot to OS in Skyrim with PSP verstage using CCP DMA.
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Change-Id: I2b12adb7e94e489bf07963a6f9a829cf4b36ad5c
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66444
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/soc/amd/sabrina/Kconfig')
| -rw-r--r-- | src/soc/amd/sabrina/Kconfig | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/amd/sabrina/Kconfig b/src/soc/amd/sabrina/Kconfig index 997a1beadd1e..e87fc8090b03 100644 --- a/src/soc/amd/sabrina/Kconfig +++ b/src/soc/amd/sabrina/Kconfig @@ -45,7 +45,7 @@ config SOC_SPECIFIC_OPTIONS select PLATFORM_USES_FSP2_0 select PROVIDES_ROM_SHARING select PSP_SUPPORTS_EFS2_RELATIVE_ADDR if VBOOT_STARTS_BEFORE_BOOTBLOCK - # TODO: b/240175446 - Enable PSP DMA after verification + select PSP_VERSTAGE_CCP_DMA if VBOOT_STARTS_BEFORE_BOOTBLOCK select RESET_VECTOR_IN_RAM select RTC select SOC_AMD_COMMON |