summaryrefslogtreecommitdiffstats
path: root/src/soc/amd/stoneyridge
diff options
context:
space:
mode:
authorFelix Held <felix-coreboot@felixheld.de>2021-12-17 18:51:21 +0100
committerFelix Held <felix-coreboot@felixheld.de>2021-12-20 09:51:07 +0000
commit20f27da2b07f1f01b340eaae28b2536ea8b94cc6 (patch)
tree7cadf53f987a3b93fe719dc979229a6c8b2c154c /src/soc/amd/stoneyridge
parent907cc5ab01a1c578392e4d8404d763467e591a5e (diff)
downloadcoreboot-20f27da2b07f1f01b340eaae28b2536ea8b94cc6.tar.gz
coreboot-20f27da2b07f1f01b340eaae28b2536ea8b94cc6.tar.bz2
coreboot-20f27da2b07f1f01b340eaae28b2536ea8b94cc6.zip
soc/amd/stoneyridge/include/southbridge: remove unneeded chip.h include
Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I9b37efc89e505c2de99536b59e7d7e2bb1d54bff Reviewed-on: https://review.coreboot.org/c/coreboot/+/60199 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/soc/amd/stoneyridge')
-rw-r--r--src/soc/amd/stoneyridge/include/soc/southbridge.h1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/soc/amd/stoneyridge/include/soc/southbridge.h b/src/soc/amd/stoneyridge/include/soc/southbridge.h
index 27737514ce88..e00bf8ef3e6f 100644
--- a/src/soc/amd/stoneyridge/include/soc/southbridge.h
+++ b/src/soc/amd/stoneyridge/include/soc/southbridge.h
@@ -7,7 +7,6 @@
#include <device/device.h>
#include <device/pci_def.h>
#include <soc/iomap.h>
-#include "chip.h"
/*
* AcpiMmio Region