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| author | Felix Held <felix-coreboot@felixheld.de> | 2023-12-20 22:47:03 +0100 |
|---|---|---|
| committer | Shelley Chen <shchen@google.com> | 2023-12-26 17:09:30 +0000 |
| commit | 727ee667561909ecb05a2671bd7d885aa111cd60 (patch) | |
| tree | e3b055cb162579545c54dba54b868f7453fc17a4 /src/soc/amd/stoneyridge | |
| parent | 1b60e5c5c92e96b11a87d2649a0045bb451d9de1 (diff) | |
| download | coreboot-727ee667561909ecb05a2671bd7d885aa111cd60.tar.gz coreboot-727ee667561909ecb05a2671bd7d885aa111cd60.tar.bz2 coreboot-727ee667561909ecb05a2671bd7d885aa111cd60.zip | |
soc/amd/stoneyridge: use is_dev_enabled(DEV_PTR())
Since we have chipset devicetrees for both SoCs supported by the
Stoneyridge code, we can use the DEV_PTR macro instead of using
pcidev_path_on_root to get the device struct pointer. We can also use
the is_dev_enabled function instead of checking the value of the enabled
element of the device struct directly.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ifb787750ebc6aa2fef9d3be0e84e6afcffdc2ac1
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79671
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/stoneyridge')
| -rw-r--r-- | src/soc/amd/stoneyridge/BiosCallOuts.c | 3 | ||||
| -rw-r--r-- | src/soc/amd/stoneyridge/fch.c | 8 | ||||
| -rw-r--r-- | src/soc/amd/stoneyridge/fch_agesa.c | 6 | ||||
| -rw-r--r-- | src/soc/amd/stoneyridge/northbridge.c | 3 |
4 files changed, 6 insertions, 14 deletions
diff --git a/src/soc/amd/stoneyridge/BiosCallOuts.c b/src/soc/amd/stoneyridge/BiosCallOuts.c index b94f3a65b904..b00f916aa118 100644 --- a/src/soc/amd/stoneyridge/BiosCallOuts.c +++ b/src/soc/amd/stoneyridge/BiosCallOuts.c @@ -37,7 +37,6 @@ AGESA_STATUS agesa_fch_initenv(uint32_t Func, uintptr_t FchData, void *ConfigPtr) { AMD_CONFIG_PARAMS *StdHeader = ConfigPtr; - const struct device *dev = pcidev_path_on_root(SATA_DEVFN); if (StdHeader->Func == AMD_INIT_ENV) { FCH_DATA_BLOCK *FchParams_env = (FCH_DATA_BLOCK *)FchData; @@ -52,7 +51,7 @@ AGESA_STATUS agesa_fch_initenv(uint32_t Func, uintptr_t FchData, /* SATA configuration */ FchParams_env->Sata.SataClass = CONFIG_STONEYRIDGE_SATA_MODE; - if (dev && dev->enabled) { + if (is_dev_enabled(DEV_PTR(sata))) { switch ((SATA_CLASS)CONFIG_STONEYRIDGE_SATA_MODE) { case SataRaid: case SataAhci: diff --git a/src/soc/amd/stoneyridge/fch.c b/src/soc/amd/stoneyridge/fch.c index 176c263c17be..3013500fa96c 100644 --- a/src/soc/amd/stoneyridge/fch.c +++ b/src/soc/amd/stoneyridge/fch.c @@ -125,8 +125,6 @@ void fch_init(void *chip_info) static void set_sb_aoac(struct aoac_devs *aoac) { - const struct device *sd, *sata; - aoac->ic0e = is_aoac_device_enabled(FCH_AOAC_DEV_I2C0); aoac->ic1e = is_aoac_device_enabled(FCH_AOAC_DEV_I2C1); aoac->ic2e = is_aoac_device_enabled(FCH_AOAC_DEV_I2C2); @@ -137,10 +135,8 @@ static void set_sb_aoac(struct aoac_devs *aoac) aoac->xhce = is_aoac_device_enabled(FCH_AOAC_DEV_USB3); /* Rely on these being in sync with devicetree */ - sd = pcidev_path_on_root(SD_DEVFN); - aoac->sd_e = sd && sd->enabled ? 1 : 0; - sata = pcidev_path_on_root(SATA_DEVFN); - aoac->st_e = sata && sata->enabled ? 1 : 0; + aoac->sd_e = is_dev_enabled(DEV_PTR(sdhci)) ? 1 : 0; + aoac->st_e = is_dev_enabled(DEV_PTR(sata)) ? 1 : 0; aoac->espi = 1; } diff --git a/src/soc/amd/stoneyridge/fch_agesa.c b/src/soc/amd/stoneyridge/fch_agesa.c index ee6ab91c6d9c..179999a47f46 100644 --- a/src/soc/amd/stoneyridge/fch_agesa.c +++ b/src/soc/amd/stoneyridge/fch_agesa.c @@ -26,9 +26,8 @@ static inline int sb_ide_enable(void) void SetFchResetParams(FCH_RESET_INTERFACE *params) { - const struct device *dev = pcidev_path_on_root(SATA_DEVFN); params->Xhci0Enable = CONFIG(STONEYRIDGE_XHCI_ENABLE); - if (dev && dev->enabled) { + if (is_dev_enabled(DEV_PTR(sata))) { params->SataEnable = sb_sata_enable(); params->IdeEnable = sb_ide_enable(); } else { @@ -39,10 +38,9 @@ void SetFchResetParams(FCH_RESET_INTERFACE *params) void SetFchEnvParams(FCH_INTERFACE *params) { - const struct device *dev = pcidev_path_on_root(SATA_DEVFN); params->AzaliaController = AzEnable; params->SataClass = CONFIG_STONEYRIDGE_SATA_MODE; - if (dev && dev->enabled) { + if (is_dev_enabled(DEV_PTR(sata))) { params->SataEnable = is_sata_config(); params->IdeEnable = !params->SataEnable; params->SataIdeMode = (CONFIG_STONEYRIDGE_SATA_MODE == diff --git a/src/soc/amd/stoneyridge/northbridge.c b/src/soc/amd/stoneyridge/northbridge.c index ef53b2ed3bac..bf2f992e33e4 100644 --- a/src/soc/amd/stoneyridge/northbridge.c +++ b/src/soc/amd/stoneyridge/northbridge.c @@ -322,8 +322,7 @@ __weak void set_board_env_params(GNB_ENV_CONFIGURATION *params) { } void SetNbEnvParams(GNB_ENV_CONFIGURATION *params) { - const struct device *dev = SOC_IOMMU_DEV; - params->IommuSupport = dev && dev->enabled; + params->IommuSupport = is_dev_enabled(DEV_PTR(iommu)); set_board_env_params(params); } |