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| author | Fred Reitberger <reitbergerfred@gmail.com> | 2022-02-02 13:30:18 -0500 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-02-09 20:24:31 +0000 |
| commit | 1e25fd426ad848f79e7ee7f7de4d3dc3ca129b1f (patch) | |
| tree | f30379c755bfd3fd7fefa1571c73737223d547d4 /src/soc/amd | |
| parent | 4b38a0b860ff154504598bdc94ddfda6f28f06d9 (diff) | |
| download | coreboot-1e25fd426ad848f79e7ee7f7de4d3dc3ca129b1f.tar.gz coreboot-1e25fd426ad848f79e7ee7f7de4d3dc3ca129b1f.tar.bz2 coreboot-1e25fd426ad848f79e7ee7f7de4d3dc3ca129b1f.zip | |
soc/amd/common/block/psp: introduce AMD_SOC_SEPARATE_EFS_SECTION
On systems that use the first 128kByte of the SPI flash for the EC
firmware, it is not possible to place the EFS/amdfw part at the lowest
location in flash where the on-chip PSP firmware will look for the EFS,
since this is at an offset of 128kByte into the flash which is where the
cbfs master header resides when the main CBFS is placed right after the
EC firmware. This patch introduces the AMD_SOC_SEPARATE_EFS_SECTION
option that allows putting the EFS in a separate FMAP section that can
be located right after the EC firmware FMAP section. The EFS FMAP
partition is checked to ensure it begins at the expected location.
Change-Id: I5ed0f76c9c9c9c180ee5f1b96f88689d0979bb5e
Signed-off-by: Fred Reitberger <reitbergerfred@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61558
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/soc/amd')
| -rw-r--r-- | src/soc/amd/common/block/psp/Kconfig | 8 | ||||
| -rw-r--r-- | src/soc/amd/common/block/psp/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/soc/amd/common/block/psp/efs_fmap_check.c | 9 |
3 files changed, 18 insertions, 0 deletions
diff --git a/src/soc/amd/common/block/psp/Kconfig b/src/soc/amd/common/block/psp/Kconfig index c5ec56015b46..7ef7e40b3bd7 100644 --- a/src/soc/amd/common/block/psp/Kconfig +++ b/src/soc/amd/common/block/psp/Kconfig @@ -27,3 +27,11 @@ config SOC_AMD_PSP_SELECTABLE_SMU_FW and each mainboard can choose to select an appropriate fanless or fanned set of blobs. Ask your AMD representative whether your APU is considered fanless. + +config AMD_SOC_SEPARATE_EFS_SECTION + bool + help + Use separate EFS FMAP section instead of putting EFS into CBFS. The + FMAP section must begin exactly at the location the EFS needs to be + placed in the flash. This option can be used to place the EFS right + after the 128kByte EC firmware at the beginning of the flash. diff --git a/src/soc/amd/common/block/psp/Makefile.inc b/src/soc/amd/common/block/psp/Makefile.inc index 94dc57ca8f60..5bae663021a8 100644 --- a/src/soc/amd/common/block/psp/Makefile.inc +++ b/src/soc/amd/common/block/psp/Makefile.inc @@ -6,6 +6,7 @@ smm-y += psp.c smm-y += psp_smm.c bootblock-y += psp_efs.c +bootblock-$(CONFIG_AMD_SOC_SEPARATE_EFS_SECTION) += efs_fmap_check.c verstage-y += psp_efs.c endif # CONFIG_SOC_AMD_COMMON_BLOCK_PSP diff --git a/src/soc/amd/common/block/psp/efs_fmap_check.c b/src/soc/amd/common/block/psp/efs_fmap_check.c new file mode 100644 index 000000000000..44dfe70ee0e1 --- /dev/null +++ b/src/soc/amd/common/block/psp/efs_fmap_check.c @@ -0,0 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <amdblocks/psp_efs.h> +#include <assert.h> +#include <fmap_config.h> +#include <soc/iomap.h> + +_Static_assert(FMAP_SECTION_EFS_START == (FLASH_BASE_ADDR + EFS_OFFSET), + "FMAP EFS Offset does not match EFS Offset - check your config"); |