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| author | Felix Held <felix.held@amd.corp-partner.google.com> | 2021-10-20 23:31:43 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-10-22 01:27:07 +0000 |
| commit | 4dd7d1196545f1dff71b8e70b7a9b80b8bcd4041 (patch) | |
| tree | 6a0c12d1d086f89d7ba7369247298a1ccde2faab /src/soc/amd | |
| parent | 82faefb339a0853dd49f10bafd2c4f5ca1723fb3 (diff) | |
| download | coreboot-4dd7d1196545f1dff71b8e70b7a9b80b8bcd4041.tar.gz coreboot-4dd7d1196545f1dff71b8e70b7a9b80b8bcd4041.tar.bz2 coreboot-4dd7d1196545f1dff71b8e70b7a9b80b8bcd4041.zip | |
cpu/x86/mp_init: move printing of failure message into mp_init_with_smm
Each CPU/SoC checks the return value of the mp_init_with_smm and prints
the same error message if it wasn't successful, so move this check and
printk to mp_init_with_smm. For this the original mp_init_with_smm
function gets renamed to do_mp_init_with_smm and a new mp_init_with_smm
function is created which then calls do_mp_init_with_smm, prints the
error if it didn't return CB_SUCCESS and passes the return value of
do_mp_init_with_smm to its caller.
Since no CPU/SoC code handles a mp_init_with_smm failure apart from
printing a message, also add a comment at the mp_init_with_smm call
sites that the code might want to handle a failure.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I181602723c204f3e43eb43302921adf7a88c81ed
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58498
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src/soc/amd')
| -rw-r--r-- | src/soc/amd/cezanne/cpu.c | 4 | ||||
| -rw-r--r-- | src/soc/amd/picasso/cpu.c | 4 | ||||
| -rw-r--r-- | src/soc/amd/stoneyridge/cpu.c | 4 |
3 files changed, 6 insertions, 6 deletions
diff --git a/src/soc/amd/cezanne/cpu.c b/src/soc/amd/cezanne/cpu.c index a2fa433a9b70..c3d89bf5134f 100644 --- a/src/soc/amd/cezanne/cpu.c +++ b/src/soc/amd/cezanne/cpu.c @@ -52,8 +52,8 @@ static const struct mp_ops mp_ops = { void mp_init_cpus(struct bus *cpu_bus) { /* Clear for take-off */ - if (mp_init_with_smm(cpu_bus, &mp_ops) != CB_SUCCESS) - printk(BIOS_ERR, "MP initialization failure.\n"); + /* TODO: Handle mp_init_with_smm failure? */ + mp_init_with_smm(cpu_bus, &mp_ops); /* pre_mp_init made the flash not cacheable. Reset to WP for performance. */ mtrr_use_temp_range(FLASH_BASE_ADDR, CONFIG_ROM_SIZE, MTRR_TYPE_WRPROT); diff --git a/src/soc/amd/picasso/cpu.c b/src/soc/amd/picasso/cpu.c index 087b15399842..9822326afe36 100644 --- a/src/soc/amd/picasso/cpu.c +++ b/src/soc/amd/picasso/cpu.c @@ -56,8 +56,8 @@ static const struct mp_ops mp_ops = { void mp_init_cpus(struct bus *cpu_bus) { /* Clear for take-off */ - if (mp_init_with_smm(cpu_bus, &mp_ops) != CB_SUCCESS) - printk(BIOS_ERR, "MP initialization failure.\n"); + /* TODO: Handle mp_init_with_smm failure? */ + mp_init_with_smm(cpu_bus, &mp_ops); /* pre_mp_init made the flash not cacheable. Reset to WP for performance. */ mtrr_use_temp_range(FLASH_BASE_ADDR, CONFIG_ROM_SIZE, MTRR_TYPE_WRPROT); diff --git a/src/soc/amd/stoneyridge/cpu.c b/src/soc/amd/stoneyridge/cpu.c index 08f553351c93..99b40a613188 100644 --- a/src/soc/amd/stoneyridge/cpu.c +++ b/src/soc/amd/stoneyridge/cpu.c @@ -54,8 +54,8 @@ static const struct mp_ops mp_ops = { void mp_init_cpus(struct bus *cpu_bus) { /* Clear for take-off */ - if (mp_init_with_smm(cpu_bus, &mp_ops) != CB_SUCCESS) - printk(BIOS_ERR, "MP initialization failure.\n"); + /* TODO: Handle mp_init_with_smm failure? */ + mp_init_with_smm(cpu_bus, &mp_ops); /* The flash is now no longer cacheable. Reset to WP for performance. */ mtrr_use_temp_range(FLASH_BASE_ADDR, CONFIG_ROM_SIZE, MTRR_TYPE_WRPROT); |