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author | Richard Spiegel <richard.spiegel@amd.corp-partner.google.com> | 2018-10-11 08:15:43 -0700 |
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committer | Martin Roth <martinroth@google.com> | 2018-10-11 21:04:10 +0000 |
commit | de5d04011cb2f3de4e93381d58a4d01d5682a3f9 (patch) | |
tree | c95e5b9f657ef1a0807c536b90b8e32e1468e806 /src/soc/amd | |
parent | f9735dc760e11136fb0a1623b3ec5a51399d3cab (diff) | |
download | coreboot-de5d04011cb2f3de4e93381d58a4d01d5682a3f9.tar.gz coreboot-de5d04011cb2f3de4e93381d58a4d01d5682a3f9.tar.bz2 coreboot-de5d04011cb2f3de4e93381d58a4d01d5682a3f9.zip |
amd/stoneyridge: Indicate STAPM units in their name
STAPM devicetree registers do not indicate the unit, which causes confusion.
More importantly, the time was assumed to be in seconds when it's actually
milliseconds. This caused early STAPM configurations to fail.
BUG=b:117590953
TEST=Build grunt
Change-Id: I2a7e3d43601992d1f7b02456913c763d940fe9ee
Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com>
Reviewed-on: https://review.coreboot.org/29035
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd')
-rw-r--r-- | src/soc/amd/stoneyridge/chip.h | 4 | ||||
-rw-r--r-- | src/soc/amd/stoneyridge/romstage.c | 9 |
2 files changed, 7 insertions, 6 deletions
diff --git a/src/soc/amd/stoneyridge/chip.h b/src/soc/amd/stoneyridge/chip.h index 8ed8e4d90347..320bef0bdfa5 100644 --- a/src/soc/amd/stoneyridge/chip.h +++ b/src/soc/amd/stoneyridge/chip.h @@ -61,8 +61,8 @@ struct soc_amd_stoneyridge_config { u8 i2c_scl_reset; struct dw_i2c_bus_config i2c[STONEY_I2C_DEV_MAX]; u8 stapm_percent; - u32 stapm_time; - u32 stapm_power; + u32 stapm_time_ms; + u32 stapm_power_mw; }; typedef struct soc_amd_stoneyridge_config config_t; diff --git a/src/soc/amd/stoneyridge/romstage.c b/src/soc/amd/stoneyridge/romstage.c index 555e9015018c..ed83e1ee1dfc 100644 --- a/src/soc/amd/stoneyridge/romstage.c +++ b/src/soc/amd/stoneyridge/romstage.c @@ -235,12 +235,13 @@ void soc_customize_init_early(AMD_EARLY_PARAMS *InitEarly) } cfg = dev->chip_info; platform = &InitEarly->PlatformConfig; - if ((cfg->stapm_percent) && (cfg->stapm_time) && (cfg->stapm_power)) { + if ((cfg->stapm_percent) && (cfg->stapm_time_ms) && + (cfg->stapm_power_mw)) { platform->PlatStapmConfig.CfgStapmScalar = cfg->stapm_percent; platform->PlatStapmConfig.CfgStapmTimeConstant = - cfg->stapm_time; - platform->PkgPwrLimitDC = cfg->stapm_power; - platform->PkgPwrLimitAC = cfg->stapm_power; + cfg->stapm_time_ms; + platform->PkgPwrLimitDC = cfg->stapm_power_mw; + platform->PkgPwrLimitAC = cfg->stapm_power_mw; platform->PlatStapmConfig.CfgStapmBoost = StapmBoostEnabled; } } |