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author | Marshall Dawson <marshalldawson3rd@gmail.com> | 2018-10-12 10:13:48 -0600 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2018-10-14 19:11:41 +0000 |
commit | fdff6c25a1ff4aa7ca63f32157ca3def5e622dea (patch) | |
tree | f7757092cb71cc0361e872985a44861b3d213111 /src/soc/amd | |
parent | ba8751fc722c4636d36331d0cf628d656d2b5cf4 (diff) | |
download | coreboot-fdff6c25a1ff4aa7ca63f32157ca3def5e622dea.tar.gz coreboot-fdff6c25a1ff4aa7ca63f32157ca3def5e622dea.tar.bz2 coreboot-fdff6c25a1ff4aa7ca63f32157ca3def5e622dea.zip |
soc/amd/stoneyridge: Remove errant parenthesis in southbridge.h
Delete an unmatched opening parenthesis in the definition for the EHCI
hub config register definition. This wasn't causing a problem unless
EHCI debug was enabled.
TEST=Jam Makefile.inc to unconditionally build enable_usbdebug.c and
verify successful build
Change-Id: I5f461d1573e416b5a8ee24329142e3c46b6a05e3
Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-on: https://review.coreboot.org/29073
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd')
-rw-r--r-- | src/soc/amd/stoneyridge/include/soc/southbridge.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/amd/stoneyridge/include/soc/southbridge.h b/src/soc/amd/stoneyridge/include/soc/southbridge.h index 403e98066904..ce0af95a205f 100644 --- a/src/soc/amd/stoneyridge/include/soc/southbridge.h +++ b/src/soc/amd/stoneyridge/include/soc/southbridge.h @@ -154,7 +154,7 @@ #define EHCI_HUB_CONFIG4 0x90 #define DEBUG_PORT_SELECT_SHIFT 16 #define DEBUG_PORT_ENABLE BIT(18) -#define DEBUG_PORT_MASK (BIT(16) | BIT(17) | (BIT(18)) +#define DEBUG_PORT_MASK (BIT(16) | BIT(17) | BIT(18)) #define WIDEIO_RANGE_ERROR -1 #define TOTAL_WIDEIO_PORTS 3 |