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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-01-23 16:46:35 +0200 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-07-04 09:36:19 +0000 |
| commit | 9c0e14e7c43e85e99c0bbfdff72019d908de1711 (patch) | |
| tree | ef1a0ffee2d7a542a2c8ccb8d2f8cba74114628b /src/soc/cavium | |
| parent | dace2498ecfadf645599aaa3ba8fef8cbb111c2d (diff) | |
| download | coreboot-9c0e14e7c43e85e99c0bbfdff72019d908de1711.tar.gz coreboot-9c0e14e7c43e85e99c0bbfdff72019d908de1711.tar.bz2 coreboot-9c0e14e7c43e85e99c0bbfdff72019d908de1711.zip | |
device/pci_ops: Define pci_find_capability() just once
Wrap the simple romstage implementation to be called
from ramstage.
Change-Id: Iadadf3d550416850d6c37233bd4eda025f4d3960
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31755
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/cavium')
| -rw-r--r-- | src/soc/cavium/common/ecam.c | 10 |
1 files changed, 4 insertions, 6 deletions
diff --git a/src/soc/cavium/common/ecam.c b/src/soc/cavium/common/ecam.c index ae2a91fe0d94..89c69dbc2e55 100644 --- a/src/soc/cavium/common/ecam.c +++ b/src/soc/cavium/common/ecam.c @@ -17,6 +17,8 @@ * Derived from Cavium's BSD-3 Clause OCTEONTX-SDK-6.2.0. */ +#define __SIMPLE_DEVICE__ + #include <device/pci_ops.h> #include <device/pci_def.h> #include <device/pci.h> @@ -27,15 +29,11 @@ * Get PCI BAR address from cavium specific extended capability. * Use regular BAR if not found in extended capability space. * - * @return The pyhsical address of the BAR, zero on error + * @return The physical address of the BAR, zero on error */ -#ifdef __SIMPLE_DEVICE__ uint64_t ecam0_get_bar_val(pci_devfn_t dev, u8 bar) -#else -uint64_t ecam0_get_bar_val(struct device *dev, u8 bar) -#endif { - size_t cap_offset = pci_find_capability(dev, 0x14); + size_t cap_offset = pci_s_find_capability(dev, 0x14); uint64_t h, l, ret = 0; if (cap_offset) { /* Found EA */ |