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| author | Francois Toguo <francois.toguo.fotso@intel.com> | 2021-04-16 21:20:39 -0700 |
|---|---|---|
| committer | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2021-05-06 03:32:22 +0000 |
| commit | cea4f92e4a2f12d09eef3a8052493786b4e9e18e (patch) | |
| tree | 3e7456bebeb32cbf836f013ebc3123c59d926d29 /src/soc/intel/alderlake/Makefile.inc | |
| parent | ee85d00ed6693df58bda545c4325fc74733ef61d (diff) | |
| download | coreboot-cea4f92e4a2f12d09eef3a8052493786b4e9e18e.tar.gz coreboot-cea4f92e4a2f12d09eef3a8052493786b4e9e18e.tar.bz2 coreboot-cea4f92e4a2f12d09eef3a8052493786b4e9e18e.zip | |
soc/intel/alderlake: Add CrashLog implementation for Intel ADL
This enables CrashLog for Intel ADL based platform.
BUG=b:183981959
TEST=CrashLog data generated, extracted, processed and decoded sucessfully on adl-m RVP.
Signed-off-by: Francois Toguo <francois.toguo.fotso@intel.com>
Change-Id: I15ba0b41f73c1772f09584f13bcf5585caa90782
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52454
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/alderlake/Makefile.inc')
| -rw-r--r-- | src/soc/intel/alderlake/Makefile.inc | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/alderlake/Makefile.inc b/src/soc/intel/alderlake/Makefile.inc index 7252085a1e88..9f92c92fa0f5 100644 --- a/src/soc/intel/alderlake/Makefile.inc +++ b/src/soc/intel/alderlake/Makefile.inc @@ -45,6 +45,7 @@ ramstage-y += reset.c ramstage-y += soundwire.c ramstage-y += systemagent.c ramstage-y += xhci.c +ramstage-$(CONFIG_SOC_INTEL_CRASHLOG) += crashlog.c smm-y += elog.c smm-y += gpio.c |