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| author | Subrata Banik <subrata.banik@intel.com> | 2021-01-29 19:17:24 +0530 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2021-01-30 14:38:38 +0000 |
| commit | 0b53d8b883684a68b1e218f6c6ddb2a9d302558c (patch) | |
| tree | 30dc37f437f4bb7612f1bff3f881752e3e29597d /src/soc/intel/alderlake/uart.c | |
| parent | 1d18c8e3c8a45cc84a41f54fc0dd88712191bc68 (diff) | |
| download | coreboot-0b53d8b883684a68b1e218f6c6ddb2a9d302558c.tar.gz coreboot-0b53d8b883684a68b1e218f6c6ddb2a9d302558c.tar.bz2 coreboot-0b53d8b883684a68b1e218f6c6ddb2a9d302558c.zip | |
soc/intel/alderlake: Remove pch.h from SoC directory
Remove unnecessary include of soc/pch.h from
- bootblock/pch.c
- bootblock/report_platform.c
- bootblock/uart.c
Define PCIE_CLK_XXX macro inside chip.h for mb/devicetree.cb to
consume.
Change-Id: Ic08ef586d4590462434ba2c64e21dd802ccc6800
Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com>
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50132
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/alderlake/uart.c')
| -rw-r--r-- | src/soc/intel/alderlake/uart.c | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/soc/intel/alderlake/uart.c b/src/soc/intel/alderlake/uart.c index 6e64e0faff80..06618b294be6 100644 --- a/src/soc/intel/alderlake/uart.c +++ b/src/soc/intel/alderlake/uart.c @@ -13,7 +13,6 @@ #include <intelblocks/pcr.h> #include <intelblocks/uart.h> #include <soc/iomap.h> -#include <soc/pch.h> #include <soc/pci_devs.h> #include <soc/pcr_ids.h> |