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| author | Subrata Banik <subrata.banik@intel.com> | 2020-11-11 23:07:18 +0530 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2020-11-12 03:51:49 +0000 |
| commit | 4e8a9c705398e269c6534dffc54c20f8009b3d76 (patch) | |
| tree | de78e271158d95bd6be045968914a3dfa5fa5c9c /src/soc/intel/alderlake | |
| parent | 2b5bdaea630ecd35e22473816cd4000dd8f8916e (diff) | |
| download | coreboot-4e8a9c705398e269c6534dffc54c20f8009b3d76.tar.gz coreboot-4e8a9c705398e269c6534dffc54c20f8009b3d76.tar.bz2 coreboot-4e8a9c705398e269c6534dffc54c20f8009b3d76.zip | |
soc/intel/alderlake: Add PCH ID 0x5181
List of changes:
1. Add new PCH ID 0x5181 into device/pci_ids.h
2. Update new PCH ID into common lpc.c
3. Add new PCH ID description into report_platform.c
TEST=Able to build and boot ADLRVP with new PCH ID.
Change-Id: I4343b7343876eb40c2955f6f4dd99d6446852dc0
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47474
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/alderlake')
| -rw-r--r-- | src/soc/intel/alderlake/bootblock/report_platform.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/alderlake/bootblock/report_platform.c b/src/soc/intel/alderlake/bootblock/report_platform.c index 38e909c73dac..f0d8f2bdc353 100644 --- a/src/soc/intel/alderlake/bootblock/report_platform.c +++ b/src/soc/intel/alderlake/bootblock/report_platform.c @@ -78,6 +78,7 @@ static struct { { PCI_DEVICE_ID_INTEL_ADP_P_ESPI_29, "Alderlake-P SKU" }, { PCI_DEVICE_ID_INTEL_ADP_P_ESPI_30, "Alderlake-P SKU" }, { PCI_DEVICE_ID_INTEL_ADP_P_ESPI_31, "Alderlake-P SKU" }, + { PCI_DEVICE_ID_INTEL_ADP_P_ESPI_32, "Alderlake-P SKU" }, }; static struct { |