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| author | Subrata Banik <subrata.banik@intel.com> | 2021-07-15 16:31:30 +0530 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2021-07-17 09:50:23 +0000 |
| commit | 87685c58576474bfeafd5935a34e1b0fceff4e5e (patch) | |
| tree | eb3417979da092b7930d86e443484060f8bedf3d /src/soc/intel/alderlake | |
| parent | f427e8028c1bc90c717661ba6b9ee9dff993d8ae (diff) | |
| download | coreboot-87685c58576474bfeafd5935a34e1b0fceff4e5e.tar.gz coreboot-87685c58576474bfeafd5935a34e1b0fceff4e5e.tar.bz2 coreboot-87685c58576474bfeafd5935a34e1b0fceff4e5e.zip | |
soc/intel/alderlake: Make use of `cpu/intel/cpu_ids.h'
Remove inclusion of mp_init.h for getting CPUIDs and use dedicated
cpu_ids.h file in SoC directory.
Change-Id: Ib62ad6a5381d346011fbc838dcd64b095fccd67b
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56338
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/intel/alderlake')
| -rw-r--r-- | src/soc/intel/alderlake/bootblock/report_platform.c | 2 | ||||
| -rw-r--r-- | src/soc/intel/alderlake/fsp_params.c | 1 | ||||
| -rw-r--r-- | src/soc/intel/alderlake/romstage/fsp_params.c | 1 |
3 files changed, 1 insertions, 3 deletions
diff --git a/src/soc/intel/alderlake/bootblock/report_platform.c b/src/soc/intel/alderlake/bootblock/report_platform.c index d8111238e81c..a064714dd77c 100644 --- a/src/soc/intel/alderlake/bootblock/report_platform.c +++ b/src/soc/intel/alderlake/bootblock/report_platform.c @@ -9,12 +9,12 @@ #include <arch/cpu.h> #include <device/pci_ops.h> #include <console/console.h> +#include <cpu/intel/cpu_ids.h> #include <cpu/intel/microcode.h> #include <cpu/x86/msr.h> #include <cpu/x86/name.h> #include <device/pci.h> #include <device/pci_ids.h> -#include <intelblocks/mp_init.h> #include <soc/bootblock.h> #include <soc/pci_devs.h> diff --git a/src/soc/intel/alderlake/fsp_params.c b/src/soc/intel/alderlake/fsp_params.c index 9dec31c66b8b..489935d05894 100644 --- a/src/soc/intel/alderlake/fsp_params.c +++ b/src/soc/intel/alderlake/fsp_params.c @@ -12,7 +12,6 @@ #include <intelblocks/lpss.h> #include <intelblocks/xdci.h> #include <intelpch/lockdown.h> -#include <intelblocks/mp_init.h> #include <intelblocks/tcss.h> #include <soc/gpio_soc_defs.h> #include <soc/intel/common/vbt.h> diff --git a/src/soc/intel/alderlake/romstage/fsp_params.c b/src/soc/intel/alderlake/romstage/fsp_params.c index b32831ede78d..2d0f6daef40e 100644 --- a/src/soc/intel/alderlake/romstage/fsp_params.c +++ b/src/soc/intel/alderlake/romstage/fsp_params.c @@ -6,7 +6,6 @@ #include <device/device.h> #include <fsp/util.h> #include <intelblocks/cpulib.h> -#include <intelblocks/mp_init.h> #include <intelblocks/pcie_rp.h> #include <soc/gpio_soc_defs.h> #include <soc/iomap.h> |