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| author | David Wu <david_wu@quanta.corp-partner.google.com> | 2021-07-26 16:02:15 +0800 |
|---|---|---|
| committer | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2021-07-28 22:54:18 +0000 |
| commit | fc009cb31ad3a334ec0860b183eb07e37a979367 (patch) | |
| tree | e281da8a38ccbd4fefae47875d56a9cb586f93db /src/soc/intel/alderlake | |
| parent | eef34ef2ee469c6876424ddc58f377bfdafaeb01 (diff) | |
| download | coreboot-fc009cb31ad3a334ec0860b183eb07e37a979367.tar.gz coreboot-fc009cb31ad3a334ec0860b183eb07e37a979367.tar.bz2 coreboot-fc009cb31ad3a334ec0860b183eb07e37a979367.zip | |
util/spd_tools/lp4x: Add new memory parts and generate SPDs
This change adds the following memory parts to LP4x global list and
generates SPDs using gen_spd.go for ADL:
1. H54G46CYRBX267
2. H54G56CYRBX247
3. K4U6E3S4AB-MGCL
4. K4UBE3D4AB-MGCL
BUG=b:194686484 b:194765811
TEST=build.
Signed-off-by: David Wu <david_wu@quanta.corp-partner.google.com>
Change-Id: If85088f843ab11cc531a3975b5cac3e36b573970
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56597
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Diffstat (limited to 'src/soc/intel/alderlake')
| -rw-r--r-- | src/soc/intel/alderlake/spd/lp4x_spd_manifest.generated.txt | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/soc/intel/alderlake/spd/lp4x_spd_manifest.generated.txt b/src/soc/intel/alderlake/spd/lp4x_spd_manifest.generated.txt index bb15c0cba901..251128996873 100644 --- a/src/soc/intel/alderlake/spd/lp4x_spd_manifest.generated.txt +++ b/src/soc/intel/alderlake/spd/lp4x_spd_manifest.generated.txt @@ -22,3 +22,7 @@ NT6AP256T32AV-J1,lp4x-spd-6.hex MT53E1G32D4NQ-046 WT:E,lp4x-spd-3.hex MT53E2G32D4NQ-046 WT:A,lp4x-spd-7.hex MT53E512M32D1NP-046 WT:B,lp4x-spd-1.hex +H54G46CYRBX267,lp4x-spd-1.hex +H54G56CYRBX247,lp4x-spd-3.hex +K4U6E3S4AB-MGCL,lp4x-spd-1.hex +K4UBE3D4AB-MGCL,lp4x-spd-3.hex |