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authorWerner Zeh <werner.zeh@siemens.com>2022-05-20 07:02:50 +0200
committerFelix Held <felix-coreboot@felixheld.de>2022-05-24 13:47:56 +0000
commit458cfaea9f9da1c9aa4c70971e607f9cbdff533f (patch)
tree1dc27ee39d6adf7bf182130ca37c2668e7ebd976 /src/soc/intel/apollolake/Makefile.inc
parent859305d45762d8499b4100765d3a7bd954038c73 (diff)
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soc/intel/apollolake: Provide FIT pointer in bootblock at build time
Before TXE releases the CPU out of reset a pointer to the constructed FIT in SRAM is patched into the loaded bootblock at offset 4G - 64B. Since this patched bootblock gets measured during runtime it will not match the one that is potentially measured from the coreboot image. This patch adds a dedicated fit.c file for Apollo Lake where the FIT pointer is already set to the address TXE will be using at runtime. Test=Compare sha256 sum from coreboot runtime and coreboot.rom of the bootblock and make sure they match. Change-Id: Ia0fd2a19517c70f50ef37e6a2dc2408bae28df10 Signed-off-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/64539 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/soc/intel/apollolake/Makefile.inc')
-rw-r--r--src/soc/intel/apollolake/Makefile.inc2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/apollolake/Makefile.inc b/src/soc/intel/apollolake/Makefile.inc
index a4ed87f45df5..11da0b3815f2 100644
--- a/src/soc/intel/apollolake/Makefile.inc
+++ b/src/soc/intel/apollolake/Makefile.inc
@@ -155,7 +155,7 @@ endif
# table + pointer, but reserving the pointer is still needed. Otherwise the
# IBBL loader thrashes code there. So include fit.c so that the linker
# reserves that pointer.
-bootblock-y += ../../../cpu/intel/fit/fit.c
+bootblock-y += bootblock/fit.c
# DSP firmware settings files.
ifeq ($(CONFIG_SOC_INTEL_GEMINILAKE),y)