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| author | Lijian Zhao <lijian.zhao@intel.com> | 2016-09-06 18:15:29 -0700 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-09-28 21:56:26 +0200 |
| commit | 9108680c1c17ec539bbba9525b6d9d62e57d296a (patch) | |
| tree | 8e82238a3ea05c54ea3c877928ef78aa94cc11c4 /src/soc/intel/apollolake/pmutil.c | |
| parent | f9c41974cd20a392125932c3376c4dfc20455331 (diff) | |
| download | coreboot-9108680c1c17ec539bbba9525b6d9d62e57d296a.tar.gz coreboot-9108680c1c17ec539bbba9525b6d9d62e57d296a.tar.bz2 coreboot-9108680c1c17ec539bbba9525b6d9d62e57d296a.zip | |
soc/intel/apollolake: Use fixed resource for SRAM and IPC1
Intel telemetry support will require PMC IPC1 and SRAM devices to be
operated in ACPI mode. Then using fixed resources on BAR0, BAR1
and BAR2 (PMC only) for those two devices will help
the resource assignment in DSDT stage.
BUG=chrome-os-partner:57364
BRANCH=None
TEST=Boot up into Chrome OS successfully and check with dmesg to see
the driver has been loaded successfully without errors.
Change-Id: I8f0983a90728b9148a124ae3443ec29cd7b344ce
Signed-off-by: Zhao, Lijian <lijian.zhao@intel.com>
Reviewed-on: https://review.coreboot.org/16648
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/apollolake/pmutil.c')
| -rw-r--r-- | src/soc/intel/apollolake/pmutil.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/src/soc/intel/apollolake/pmutil.c b/src/soc/intel/apollolake/pmutil.c index 56bb33dc40e3..80aaf715afa0 100644 --- a/src/soc/intel/apollolake/pmutil.c +++ b/src/soc/intel/apollolake/pmutil.c @@ -34,8 +34,7 @@ static uintptr_t read_pmc_mmio_bar(void) { - uint32_t bar = pci_read_config32(PMC_DEV, PCI_BASE_ADDRESS_0); - return bar & ~PCI_BASE_ADDRESS_MEM_ATTR_MASK; + return PMC_BAR0; } uintptr_t get_pmc_mmio_bar(void) |