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authorElyes HAOUAS <ehaouas@noos.fr>2018-05-22 10:42:28 +0200
committerNico Huber <nico.h@gmx.de>2018-05-24 18:38:25 +0000
commit17a3ceb2feb74ffbe4c039aecb4ec3ea2aca910c (patch)
tree99473a053ee233ec8a3b55ae960a0e3d050b51ed /src/soc/intel/baytrail/gfx.c
parent148b1db9c968b4e1de768ecf3dffa3996aecccbe (diff)
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soc/intel/baytrail: Get rid of device_t
Use of device_t has been abandoned in ramstage. Change-Id: I8b2cfe3e2090fb8eed755e40d337c6049d8dd96e Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/26456 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/soc/intel/baytrail/gfx.c')
-rw-r--r--src/soc/intel/baytrail/gfx.c17
1 files changed, 9 insertions, 8 deletions
diff --git a/src/soc/intel/baytrail/gfx.c b/src/soc/intel/baytrail/gfx.c
index 45bcd7ba7d7e..f8e78d23a834 100644
--- a/src/soc/intel/baytrail/gfx.c
+++ b/src/soc/intel/baytrail/gfx.c
@@ -38,7 +38,7 @@
* Lock Power Context Base Register to point to a 24KB block
* of memory in GSM. Power context save data is stored here.
*/
-static void gfx_lock_pcbase(device_t dev)
+static void gfx_lock_pcbase(struct device *dev)
{
struct resource *res = find_resource(dev, PCI_BASE_ADDRESS_0);
const u16 gms_size_map[17] = { 0,32,64,96,128,160,192,224,256,
@@ -263,18 +263,19 @@ static const struct reg_script gfx_post_vbios_script[] = {
REG_SCRIPT_END
};
-static inline void gfx_run_script(device_t dev, const struct reg_script *ops)
+static inline void gfx_run_script(struct device *dev,
+ const struct reg_script *ops)
{
reg_script_run_on_dev(dev, ops);
}
-static void gfx_pre_vbios_init(device_t dev)
+static void gfx_pre_vbios_init(struct device *dev)
{
printk(BIOS_INFO, "GFX: Pre VBIOS Init\n");
gfx_run_script(dev, gpu_pre_vbios_script);
}
-static void gfx_pm_init(device_t dev)
+static void gfx_pm_init(struct device *dev)
{
printk(BIOS_INFO, "GFX: Power Management Init\n");
gfx_run_script(dev, gfx_init_script);
@@ -283,13 +284,13 @@ static void gfx_pm_init(device_t dev)
gfx_lock_pcbase(dev);
}
-static void gfx_post_vbios_init(device_t dev)
+static void gfx_post_vbios_init(struct device *dev)
{
printk(BIOS_INFO, "GFX: Post VBIOS Init\n");
gfx_run_script(dev, gfx_post_vbios_script);
}
-static void set_backlight_pwm(device_t dev, uint32_t bklt_reg, int req_hz)
+static void set_backlight_pwm(struct device *dev, uint32_t bklt_reg, int req_hz)
{
int divider;
struct resource *res;
@@ -310,7 +311,7 @@ static void set_backlight_pwm(device_t dev, uint32_t bklt_reg, int req_hz)
write32((u32 *)(uintptr_t)(res->base + bklt_reg), divider << 16);
}
-static void gfx_panel_setup(device_t dev)
+static void gfx_panel_setup(struct device *dev)
{
struct soc_intel_baytrail_config *config = dev->chip_info;
struct reg_script gfx_pipea_init[] = {
@@ -378,7 +379,7 @@ void gma_set_gnvs_aslb(void *gnvs, uintptr_t aslb)
gnvs_ptr->aslb = aslb;
}
-static void gfx_init(device_t dev)
+static void gfx_init(struct device *dev)
{
/* Pre VBIOS Init */
gfx_pre_vbios_init(dev);