diff options
| author | Aaron Durbin <adurbin@chromium.org> | 2013-11-12 16:40:33 -0600 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-05-07 12:04:23 +0200 |
| commit | c626b74c1d5e1faaa6a23e3d658b0e097e6404f9 (patch) | |
| tree | 5d9fab625822420ac7d05c86df52e16b97526ec9 /src/soc/intel/baytrail/ramstage.c | |
| parent | e8f97d4f55816a298e672375ad39c37158acd61a (diff) | |
| download | coreboot-c626b74c1d5e1faaa6a23e3d658b0e097e6404f9.tar.gz coreboot-c626b74c1d5e1faaa6a23e3d658b0e097e6404f9.tar.bz2 coreboot-c626b74c1d5e1faaa6a23e3d658b0e097e6404f9.zip | |
baytrail: initialize common SSC functionality
The SSC (storage control cluster) houses the SD, SDIO, and eMMC
interfaces. The scc cofniguration function, baytrail_init_scc(),
is ran in the pre device stage to initialize the SCC. The eMMC
is expected to be configured for version 4.5.
BUG=chrome-os-partner:23966
BRANCH=None
TEST=Built and booted with some other eMMC changes into login screen off
of eMMC device.
Change-Id: I81cc755a790b7e43ad234a8201dae480277202c8
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/176535
Reviewed-by: Bernie Thompson <bhthompson@chromium.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: http://review.coreboot.org/4966
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/soc/intel/baytrail/ramstage.c')
| -rw-r--r-- | src/soc/intel/baytrail/ramstage.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/intel/baytrail/ramstage.c b/src/soc/intel/baytrail/ramstage.c index 0c2bed86b7bd..b0b48b0eaa73 100644 --- a/src/soc/intel/baytrail/ramstage.c +++ b/src/soc/intel/baytrail/ramstage.c @@ -166,6 +166,8 @@ void baytrail_init_pre_device(void) config = mainboard_get_gpios(); setup_soc_gpios(config); + baytrail_init_scc(); + /* Indicate S3 resume to rest of ramstage. */ s3_resume_prepare(); } |