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| author | Angel Pons <th3fanbus@gmail.com> | 2021-09-07 11:39:26 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-09-08 14:35:16 +0000 |
| commit | 44985ae75712fd5b281ca34dc1ff185e9e77a0c2 (patch) | |
| tree | a3ef7fb7a1ed06502705e685d60bb0e44455d36c /src/soc/intel/baytrail | |
| parent | 1a4496e79f21bef12efc8c6748264a8770266a27 (diff) | |
| download | coreboot-44985ae75712fd5b281ca34dc1ff185e9e77a0c2.tar.gz coreboot-44985ae75712fd5b281ca34dc1ff185e9e77a0c2.tar.bz2 coreboot-44985ae75712fd5b281ca34dc1ff185e9e77a0c2.zip | |
cpu/x86/tsc: Deduplicate Makefile logic
The code under `cpu/x86/tsc` is only compiled in when its `Makefile.inc`
is included from platform (CPU/SoC) code and the `UDELAY_TSC` Kconfig
option is enabled.
Include `cpu/x86/tsc/Makefile.inc` once from `cpu/x86/Makefile.inc` and
drop the now-redundant inclusions from platform code. Also, deduplicate
the `UDELAY_TSC` guards.
Change-Id: I41e96026f37f19de954fd5985b92a08cb97876c1
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57456
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/baytrail')
| -rw-r--r-- | src/soc/intel/baytrail/Makefile.inc | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/soc/intel/baytrail/Makefile.inc b/src/soc/intel/baytrail/Makefile.inc index f4c4d7e75a4c..1fabd4f80fe2 100644 --- a/src/soc/intel/baytrail/Makefile.inc +++ b/src/soc/intel/baytrail/Makefile.inc @@ -3,7 +3,6 @@ ifeq ($(CONFIG_SOC_INTEL_BAYTRAIL),y) subdirs-y += romstage subdirs-y += ../../../cpu/x86/lapic subdirs-y += ../../../cpu/x86/mtrr -subdirs-y += ../../../cpu/x86/tsc subdirs-y += ../../../cpu/intel/microcode subdirs-y += ../../../cpu/intel/turbo subdirs-y += ../../../cpu/intel/common |