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| author | Elyes HAOUAS <ehaouas@noos.fr> | 2022-01-11 20:57:11 +0100 |
|---|---|---|
| committer | Martin L Roth <gaumless@tutanota.com> | 2022-05-16 02:37:00 +0000 |
| commit | 910a63ce0df93f8f22d6346c72fcf9b3b831ac13 (patch) | |
| tree | 45b70fe31e69e09f9d08843ff7859260ed7ce00f /src/soc/intel/baytrail | |
| parent | 386e8494bb05b7066ac87f70e92bce799e2d0872 (diff) | |
| download | coreboot-910a63ce0df93f8f22d6346c72fcf9b3b831ac13.tar.gz coreboot-910a63ce0df93f8f22d6346c72fcf9b3b831ac13.tar.bz2 coreboot-910a63ce0df93f8f22d6346c72fcf9b3b831ac13.zip | |
soc/intel: Remove unused <cpu/x86/tsc.h>
Change-Id: I322a94186b92033fc27ba97785b55df09aa317f7
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61009
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@tutanota.com>
Diffstat (limited to 'src/soc/intel/baytrail')
| -rw-r--r-- | src/soc/intel/baytrail/refcode_native.c | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/soc/intel/baytrail/refcode_native.c b/src/soc/intel/baytrail/refcode_native.c index a9976fb409d3..c915530860c2 100644 --- a/src/soc/intel/baytrail/refcode_native.c +++ b/src/soc/intel/baytrail/refcode_native.c @@ -2,7 +2,6 @@ #include <device/mmio.h> #include <console/console.h> -#include <cpu/x86/tsc.h> #include <device/pci.h> #include <delay.h> #include <soc/pci_devs.h> |