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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2021-01-25 17:05:35 +0200 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2021-02-11 16:37:28 +0000 |
| commit | aa969e887af6c76c0d5e694a3a17e14ee13d27b2 (patch) | |
| tree | 5f1c4ace30add956f2ccabed909a142fb351e856 /src/soc/intel/braswell | |
| parent | f6f1215cdbbae04de8f84654d064b376395cf203 (diff) | |
| download | coreboot-aa969e887af6c76c0d5e694a3a17e14ee13d27b2.tar.gz coreboot-aa969e887af6c76c0d5e694a3a17e14ee13d27b2.tar.bz2 coreboot-aa969e887af6c76c0d5e694a3a17e14ee13d27b2.zip | |
ACPI: Move PICM declaration
Variable PICM was not inside GNVS region and can use a static
initialisation value.
For most AMD platforms PICM default changes from 1 to 0.
Fix comments about PICM==0 used to indicate use of i8259 PIC for
interrupt delivery.
Change-Id: I525ef8353514ec32941c4d0c37cab38aa320cb20
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49905
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/braswell')
| -rw-r--r-- | src/soc/intel/braswell/acpi/globalnvs.asl | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/src/soc/intel/braswell/acpi/globalnvs.asl b/src/soc/intel/braswell/acpi/globalnvs.asl index 5642e6afce55..206b4666a8d5 100644 --- a/src/soc/intel/braswell/acpi/globalnvs.asl +++ b/src/soc/intel/braswell/acpi/globalnvs.asl @@ -2,8 +2,6 @@ /* Global Variables */ -Name(\PICM, 0) /* IOAPIC/8259 */ - Field (GNVS, ByteAcc, NoLock, Preserve) { /* Miscellaneous */ |