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| author | Furquan Shaikh <furquan@google.com> | 2021-06-18 12:56:21 +0000 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2021-08-24 09:59:27 +0000 |
| commit | 93078ba1ae144304a19c83ae7d565cb2c39c1d15 (patch) | |
| tree | ac3f4c02d48b9c713292fd93cdfea988bfdbb41c /src/soc/intel/broadwell/include/soc/pch.h | |
| parent | 711b6c5c2d9a0833a06821aeaca28d925706333e (diff) | |
| download | coreboot-93078ba1ae144304a19c83ae7d565cb2c39c1d15.tar.gz coreboot-93078ba1ae144304a19c83ae7d565cb2c39c1d15.tar.bz2 coreboot-93078ba1ae144304a19c83ae7d565cb2c39c1d15.zip | |
Revert "soc/intel/broadwell/pch: Drop device NVS remainders"
This reverts commit 34bd6ba97917b0bc54bb1f1e106a56b5c03e19ac.
Reason for revert: Device NVS is expected by mainboard samus
in payload depthcharge:
https://chromium.googlesource.com/chromiumos/platform/depthcharge/+/932c6ba2704987c0db64dbdfe03c158482c7ab11/src/board/samus/board.c#60
Not reverted:
* ACPI_HAS_DEVICE_NVS does not exist anymore in ToT and hence it's
selection in broadwell is not required.
Signed-off-by: Furquan Shaikh <furquan@google.com>
Change-Id: Ic31d7ae62c5df72708b724160e96e10b46002eb1
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54976
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/soc/intel/broadwell/include/soc/pch.h')
| -rw-r--r-- | src/soc/intel/broadwell/include/soc/pch.h | 21 |
1 files changed, 0 insertions, 21 deletions
diff --git a/src/soc/intel/broadwell/include/soc/pch.h b/src/soc/intel/broadwell/include/soc/pch.h index 8367a39b7f3e..8089f5bdb0af 100644 --- a/src/soc/intel/broadwell/include/soc/pch.h +++ b/src/soc/intel/broadwell/include/soc/pch.h @@ -4,7 +4,6 @@ #define _BROADWELL_PCH_H_ #include <acpi/acpi.h> -#include <types.h> /* Haswell ULT Pch (LynxPoint-LP) */ #define PCH_LPT_LP_SAMPLE 0x9c41 @@ -26,25 +25,6 @@ #define PCH_PCS 0x84 #define PCH_PCS_PS_D3HOT 3 -enum pch_acpi_device { - PCH_ACPI_SDMA = 0, - PCH_ACPI_I2C0, - PCH_ACPI_I2C1, - PCH_ACPI_GSPI0, - PCH_ACPI_GSPI1, - PCH_ACPI_UART0, - PCH_ACPI_UART1, - PCH_ACPI_SDIO, - PCH_ACPI_ADSP, - NUM_PCH_ACPI_DEVICES, -}; - -struct pch_acpi_device_state { - bool enable; - uint32_t bar0; - uint32_t bar1; -}; - u8 pch_revision(void); u16 pch_type(void); int pch_is_wpt(void); @@ -52,7 +32,6 @@ int pch_is_wpt_ulx(void); u32 pch_read_soft_strap(int id); void pch_disable_devfn(struct device *dev); -struct pch_acpi_device_state *get_acpi_device_state(enum pch_acpi_device dev_index); void acpi_create_serialio_ssdt(acpi_header_t *ssdt); void broadwell_pch_finalize(void); |