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| author | Matt DeVillier <matt.devillier@gmail.com> | 2021-09-13 17:53:05 -0500 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-09-15 15:28:57 +0000 |
| commit | 80f95b5214fd716bb146f795a0dd3921c088280e (patch) | |
| tree | d6c3954518f32c6cc50140a739ac026e975daac9 /src/soc/intel/broadwell | |
| parent | 7e45bb1a1207e414ccaee59ab736ade751644c4a (diff) | |
| download | coreboot-80f95b5214fd716bb146f795a0dd3921c088280e.tar.gz coreboot-80f95b5214fd716bb146f795a0dd3921c088280e.tar.bz2 coreboot-80f95b5214fd716bb146f795a0dd3921c088280e.zip | |
soc/broadwell/acpi.c: Fix unresolvable symbol '\DNVS'
Fixes:
27c51a0 ("Revert "soc/intel/broadwell/pch: Replace ACPI device NVS"")
which reverted the removal of device NVS, but was not boot tested on any
Broadwell Chromebooks. It was recently discovered that the DNVS
object was not being loaded, due to a weak function setting the size
as zero not being defined for the platform/soc. Add the missing
overloaded function and required headers.
Test: build/boot google/auron variants LULU ans SAMUS, verify
touchpad functional and no ACPI errors in kernel boot log.
Change-Id: Icd317d117dbb068bb6da80fe56c06c0267c7b2ae
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/57630
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Diffstat (limited to 'src/soc/intel/broadwell')
| -rw-r--r-- | src/soc/intel/broadwell/acpi.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/src/soc/intel/broadwell/acpi.c b/src/soc/intel/broadwell/acpi.c index 67b193e1f703..512f9f3d461f 100644 --- a/src/soc/intel/broadwell/acpi.c +++ b/src/soc/intel/broadwell/acpi.c @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <acpi/acpi.h> +#include <acpi/acpi_gnvs.h> #include <acpi/acpigen.h> #include <arch/ioapic.h> #include <arch/smp/mpspec.h> @@ -12,6 +13,7 @@ #include <cpu/x86/msr.h> #include <cpu/intel/turbo.h> #include <soc/acpi.h> +#include <soc/device_nvs.h> #include <soc/iomap.h> #include <soc/lpc.h> #include <soc/pci_devs.h> @@ -102,3 +104,8 @@ unsigned long northbridge_write_acpi_tables(const struct device *const dev, return current; } + +size_t size_of_dnvs(void) +{ + return sizeof(struct device_nvs); +} |