diff options
| author | Felix Singer <felixsinger@posteo.net> | 2021-12-31 00:15:18 +0100 |
|---|---|---|
| committer | Felix Singer <felixsinger@posteo.net> | 2022-05-26 11:48:28 +0000 |
| commit | 8ba9410c69dbdb9e37bd7c8de2a523f7cfa7a76a (patch) | |
| tree | 48a7fce684f8bde1b30fdf9d1965175c0181a3cf /src/soc/intel/cannonlake | |
| parent | edb1a4012700df227dcf5780b5f45fcf9c2a1625 (diff) | |
| download | coreboot-8ba9410c69dbdb9e37bd7c8de2a523f7cfa7a76a.tar.gz coreboot-8ba9410c69dbdb9e37bd7c8de2a523f7cfa7a76a.tar.bz2 coreboot-8ba9410c69dbdb9e37bd7c8de2a523f7cfa7a76a.zip | |
soc/intel/cannonlake: Hook up FSP hyper-threading setting to option API
Select `HAVE_HYPERTHREADING` and hook up the hyper-threading setting
from the FSP to the option API so that related mainboards don't have to
do that. Unless otherwise configured (e.g. the CMOS setting or overriden
by the mainboard code), the value from the Kconfig setting
`FSP_HYPERTHREADING` is used.
Also, remove related code from the following mainboards, since it is
obsolete now.
* siemens/chili
* starlabs/laptop/cml
Change-Id: I173b87da5ce76549672c50ba30204cd77be8b82f
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60544
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sean Rhodes <sean@starlabs.systems>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/soc/intel/cannonlake')
| -rw-r--r-- | src/soc/intel/cannonlake/Kconfig | 1 | ||||
| -rw-r--r-- | src/soc/intel/cannonlake/romstage/fsp_params.c | 3 |
2 files changed, 4 insertions, 0 deletions
diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig index 7c317e90c60c..cad2e752b8ee 100644 --- a/src/soc/intel/cannonlake/Kconfig +++ b/src/soc/intel/cannonlake/Kconfig @@ -66,6 +66,7 @@ config CPU_SPECIFIC_OPTIONS select GENERIC_GPIO_LIB select HAVE_FSP_GOP select HAVE_FSP_LOGO_SUPPORT + select HAVE_HYPERTHREADING select HAVE_SMI_HANDLER select IDT_IN_EVERY_STAGE select INTEL_CAR_NEM_ENHANCED diff --git a/src/soc/intel/cannonlake/romstage/fsp_params.c b/src/soc/intel/cannonlake/romstage/fsp_params.c index 0b63bd52f98f..842c8fb7d076 100644 --- a/src/soc/intel/cannonlake/romstage/fsp_params.c +++ b/src/soc/intel/cannonlake/romstage/fsp_params.c @@ -8,6 +8,7 @@ #include <fsp/util.h> #include <intelblocks/cpulib.h> #include <intelblocks/pmclib.h> +#include <option.h> #include <soc/iomap.h> #include <soc/msr.h> #include <soc/pci_devs.h> @@ -26,6 +27,8 @@ void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version) unsigned int i; uint32_t mask = 0; + m_cfg->HyperThreading = get_uint_option("hyper_threading", CONFIG(FSP_HYPERTHREADING)); + /* * Probe for no IGD and disable InternalGfx and panel power to prevent a * crash in FSP-M. |