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| author | Subrata Banik <subrata.banik@intel.com> | 2019-09-11 10:32:31 +0530 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-09-12 13:16:46 +0000 |
| commit | 8cced29eed33285e0a086231c567f4633372f004 (patch) | |
| tree | bbeb0fb7e11c76f0ef9a8fe2b3e70663ab3d66d5 /src/soc/intel/cannonlake | |
| parent | d589c8681ebaa9b45168a23c8d3fe522e776b0f4 (diff) | |
| download | coreboot-8cced29eed33285e0a086231c567f4633372f004.tar.gz coreboot-8cced29eed33285e0a086231c567f4633372f004.tar.bz2 coreboot-8cced29eed33285e0a086231c567f4633372f004.zip | |
soc/intel/cnl: Remove unnecessary FSP UPD “PchPwrOptEnable” usage
PchPwrOptEnable FSP UPD is for internal testing and not really available
in externally released FSP source hence assigning this UPD using devicetree
config dmipwroptimize doesn't do anything.
TEST=Build and boot sarien/arcada.
Change-Id: I6da2a088fb697e57d12008fa18bd1764b3da7765
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35323
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: V Sowmya <v.sowmya@intel.com>
Diffstat (limited to 'src/soc/intel/cannonlake')
| -rw-r--r-- | src/soc/intel/cannonlake/chip.h | 3 | ||||
| -rw-r--r-- | src/soc/intel/cannonlake/fsp_params.c | 1 |
2 files changed, 0 insertions, 4 deletions
diff --git a/src/soc/intel/cannonlake/chip.h b/src/soc/intel/cannonlake/chip.h index 9c7c17147e54..451c920faeee 100644 --- a/src/soc/intel/cannonlake/chip.h +++ b/src/soc/intel/cannonlake/chip.h @@ -387,9 +387,6 @@ struct soc_intel_cannonlake_config { uint8_t SlowSlewRateForSa; uint8_t SlowSlewRateForFivr; - /* DMI Power Optimizer */ - uint8_t dmipwroptimize; - /* SATA Power Optimizer */ uint8_t satapwroptimize; diff --git a/src/soc/intel/cannonlake/fsp_params.c b/src/soc/intel/cannonlake/fsp_params.c index f48a626be989..76d40aa6246d 100644 --- a/src/soc/intel/cannonlake/fsp_params.c +++ b/src/soc/intel/cannonlake/fsp_params.c @@ -377,7 +377,6 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) params->FastPkgCRampDisableFivr = config->FastPkgCRampDisableFivr; /* Power Optimizer */ - params->PchPwrOptEnable = config->dmipwroptimize; params->SataPwrOptEnable = config->satapwroptimize; /* Disable PCH ACPI timer */ |