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| author | Elyes HAOUAS <ehaouas@noos.fr> | 2022-01-12 21:15:21 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-04-22 21:37:56 +0000 |
| commit | afeaa4dfc3d5b147e9f77be71cd8a88f770257bc (patch) | |
| tree | 4d4d369c4ce1f2c1402429644a5f6a41185d5b11 /src/soc/intel/cannonlake | |
| parent | f759a6257c0de47a579ec5fdfbd9d88f063669ec (diff) | |
| download | coreboot-afeaa4dfc3d5b147e9f77be71cd8a88f770257bc.tar.gz coreboot-afeaa4dfc3d5b147e9f77be71cd8a88f770257bc.tar.bz2 coreboot-afeaa4dfc3d5b147e9f77be71cd8a88f770257bc.zip | |
soc/intel: Remove unused <cbmem.h>
Change-Id: I529c822c9e952dae6613d3de64f6709e0fd9b385
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61056
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/soc/intel/cannonlake')
| -rw-r--r-- | src/soc/intel/cannonlake/fsp_params.c | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/soc/intel/cannonlake/fsp_params.c b/src/soc/intel/cannonlake/fsp_params.c index 1726cd7c2085..7051f513bd7b 100644 --- a/src/soc/intel/cannonlake/fsp_params.c +++ b/src/soc/intel/cannonlake/fsp_params.c @@ -1,7 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <bootsplash.h> -#include <cbmem.h> #include <console/console.h> #include <device/device.h> #include <device/pci.h> |