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author | Pratikkumar Prajapati <pratikkumar.v.prajapati@intel.com> | 2023-05-30 11:28:21 -0700 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2023-06-01 13:14:15 +0000 |
commit | 5f3b6545f4ce1f6f0a0a44958c9a924f3639ea71 (patch) | |
tree | 04e505e96450740eff76728921e67997adaf7c33 /src/soc/intel/common/block/crashlog | |
parent | d4330e7dfb121db43399dd18855b2b9af0f02c4a (diff) | |
download | coreboot-5f3b6545f4ce1f6f0a0a44958c9a924f3639ea71.tar.gz coreboot-5f3b6545f4ce1f6f0a0a44958c9a924f3639ea71.tar.bz2 coreboot-5f3b6545f4ce1f6f0a0a44958c9a924f3639ea71.zip |
soc/intel/common/crashlog: Check for invalid record
Do not copy the crashlog record if the record is 0xdeadbeef
Bug=None
TEST=Able to build. With Meteor Lake SOC related patch, able to
capture and decode crashlog.
Change-Id: I0edbf6902685a882876d525e63c5b602c1590ea1
Signed-off-by: Pratikkumar Prajapati <pratikkumar.v.prajapati@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75527
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Diffstat (limited to 'src/soc/intel/common/block/crashlog')
-rw-r--r-- | src/soc/intel/common/block/crashlog/crashlog.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/crashlog/crashlog.c b/src/soc/intel/common/block/crashlog/crashlog.c index daa5b763cf35..aa2a240ce8d5 100644 --- a/src/soc/intel/common/block/crashlog/crashlog.c +++ b/src/soc/intel/common/block/crashlog/crashlog.c @@ -271,6 +271,14 @@ bool cl_copy_data_from_sram(u32 src_bar, u32 src_addr = src_bar + offset; u32 data = read32((u32 *)src_addr); + + /* First 32bits of the record must not be 0xdeadbeef */ + if (data == INVALID_CRASHLOG_RECORD) { + printk(BIOS_DEBUG, "Invalid data 0x%x at offset 0x%x from addr 0x%x\n", + data, offset, src_bar); + return false; + } + /* PMC: copy if 1st DWORD in buffer is not zero and its 31st bit is not set */ if (pmc_sram && !(data && !(data & BIT(31)))) { printk(BIOS_DEBUG, "Invalid data 0x%x at offset 0x%x from addr 0x%x" |