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| author | Sridhar Siricilla <sridhar.siricilla@intel.com> | 2019-09-13 16:32:00 +0530 |
|---|---|---|
| committer | Subrata Banik <subrata.banik@intel.com> | 2020-08-13 05:44:24 +0000 |
| commit | b2353a7bdcaca6a6138e641ff1c5cfcbc7e6e799 (patch) | |
| tree | bfea012fdebc45bf5a8e079d05b0892c21ddc4ea /src/soc/intel/common/block/cse/Kconfig | |
| parent | 77025b3f56ab599db70e923650eb6e42d84f267f (diff) | |
| download | coreboot-b2353a7bdcaca6a6138e641ff1c5cfcbc7e6e799.tar.gz coreboot-b2353a7bdcaca6a6138e641ff1c5cfcbc7e6e799.tar.bz2 coreboot-b2353a7bdcaca6a6138e641ff1c5cfcbc7e6e799.zip | |
soc/intel/common/block: Stitch CSE blobs into FW_MAIN_X partitions
Add Kconfig option for CSE me_rw blob path and stitch the me_rw blob
into FW_MAIN_X partitions.
BUG=b:145796136
Change-Id: I1d2908e9e16858c5f333e1b10b19d18b7ca27765
Signed-off-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/35406
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/common/block/cse/Kconfig')
| -rw-r--r-- | src/soc/intel/common/block/cse/Kconfig | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/cse/Kconfig b/src/soc/intel/common/block/cse/Kconfig index b6f49c61e83f..1cb7d35fb030 100644 --- a/src/soc/intel/common/block/cse/Kconfig +++ b/src/soc/intel/common/block/cse/Kconfig @@ -31,3 +31,9 @@ config SOC_INTEL_CSE_RW_CBFS_NAME default "me_rw" help CBFS entry name for Intel CSE CBFS RW blob + +config SOC_INTEL_CSE_RW_FILE + string "Intel CSE CBFS RW path and filename" + default "" + help + Intel CSE CBFS RW blob path and file name |