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| author | John Zhao <john.zhao@intel.com> | 2019-07-09 14:27:28 -0700 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2019-07-11 15:00:13 +0000 |
| commit | 1ceac4efcfa3a9ccc0d44f77855f4949f59305b5 (patch) | |
| tree | 946954147db100c61463e1642ff6d3814cf078ca /src/soc/intel/common/block/fast_spi/fast_spi.c | |
| parent | b8501c7c5f00a664ff644324af363d43c5af1bc2 (diff) | |
| download | coreboot-1ceac4efcfa3a9ccc0d44f77855f4949f59305b5.tar.gz coreboot-1ceac4efcfa3a9ccc0d44f77855f4949f59305b5.tar.bz2 coreboot-1ceac4efcfa3a9ccc0d44f77855f4949f59305b5.zip | |
soc/intel/common: Check bios_size and window_size after MIN operation
Clang Static Analyzer version 8.0.0 detects that the result of
log2_ceil(bios_size) and log2_ceil(window_size) is undefined if the
value of bios_size and window_size are negative. Add negative value
Check for bios_size and window_size after MIN operation.
Change-Id: I28577b6e0ba0ab45bb7804c17ba1f26c4b078b15
Signed-off-by: John Zhao <john.zhao@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34182
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc/intel/common/block/fast_spi/fast_spi.c')
| -rw-r--r-- | src/soc/intel/common/block/fast_spi/fast_spi.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/common/block/fast_spi/fast_spi.c b/src/soc/intel/common/block/fast_spi/fast_spi.c index e40b84493e14..5c29addcc9c7 100644 --- a/src/soc/intel/common/block/fast_spi/fast_spi.c +++ b/src/soc/intel/common/block/fast_spi/fast_spi.c @@ -241,7 +241,7 @@ void fast_spi_cache_bios_region(void) * protection, so limit the cached bios region to be no more than 16MB. * */ bios_size = MIN(bios_size, 16 * MiB); - if (!bios_size) + if (bios_size <= 0) return; /* Round to power of two */ |